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Content Provider | IEEE Xplore Digital Library |
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Author | Kang Li JueBang Yu YongBingYu Yong Liao Fan Li Qingyun Fu |
Copyright Year | 2008 |
Description | Author affiliation: Sch. of Electron. Eng., Univ. of Electron. & Sci. Technol. of China, Chengdu (Kang Li; JueBang Yu; YongBingYu; Yong Liao; Fan Li; Qingyun Fu) |
Abstract | It is often the truth that most of design had been finished besides one or two of routing was failed or emergent requirement of additional interconnection of two special modules occurred lately in VLSI design process. In such situations, it is wise to mend the flaws rather than to repeat whole design process from the very beginning. To solve such little amendment of interconnection, insertion of dummy modules are proposed to connect two specially designated modules based on B*-tree representation. Depending on parent-son relationships of nodes in a B*-tree and geometric relationships between corresponding modules in the placement, it is easy to insert some hypothetical empty modules to connect any two modules. Corresponding modification of B*-tree is also discussed in the paper. |
Starting Page | 1354 |
Ending Page | 1357 |
File Size | 1102759 |
Page Count | 4 |
File Format | |
ISBN | 9781424420636 |
DOI | 10.1109/ICCCAS.2008.4658017 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2008-05-25 |
Publisher Place | China |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Pediatrics Design automation Layout Integrated circuit interconnections Binary trees Routing Integrated circuit modeling |
Content Type | Text |
Resource Type | Article |
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