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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Pratas, F. Tomas, P. Trancoso, P. Sousa, L. |
| Copyright Year | 2012 |
| Description | Author affiliation: INESC-ID/IST, Technical University of Lisbon, Portugal (Pratas, F.; Tomas, P.; Sousa, L.) || Department of Computer Science, University of Cyprus, Nicosia, Cyprus (Trancoso, P.) |
| Abstract | Reconfigurable hardware can be used as an energy and performance efficient co-processing solution to accelerate certain types of applications. To facilitate the design of hardware accelerators we have proposed a methodology that adopts the stream-based computing model and the usage of Graphics Processing Units as prototyping platforms. In this paper we go a step further and propose a new modular architecture for low-power reconfigurable systems to easily map the stream-based algorithms. In particular, the architecture consists of a semi-programable accelerator set that can be adapted to the application needs in terms of functional units and number of streaming engines. The proposed embedded architecture mates the flexibility of reconfigurable hardware with the advantages of stream computing for the strict needs of embedded reconfigurable devices. We show a possible organization for this architecture. Moreover, we provide a general case study to analyze the scalability of the proposed architecture in an Altera FPGA. Our experimental results show that a significant speed-up can be achieved compared to general purpose processors using low-power FPGA devices. Our preliminary estimates show that it is also possible to achieve energy savings of up to 118x. |
| Starting Page | 193 |
| Ending Page | 200 |
| File Size | 1717146 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781467322959 |
| e-ISBN | 9781467322973 |
| e-ISBN | 9781467322966 |
| DOI | 10.1109/SAMOS.2012.6404174 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-07-16 |
| Publisher Place | Greece |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Algorithm design and analysis Program processors Computer architecture Organizations Hardware Kernel Field programmable gate arrays |
| Content Type | Text |
| Resource Type | Article |
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