NDLI: Efficient image processing application using residue number system

Please wait, while we are loading the content...

2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013

International programme committee

Table of contents

General invited papers

A mixed-design technique for integrated MEMS using a circuit simulator with HDL

BSIM compact MOSFET models for SPICE simulation

Design and simulation of ESD-resistant ICs

On the use of compact modeling for RF/analog design automation

The art of modeling and predictive simulation in power electronics and microsystems

Top-down drift-diffusion versus bottom-up quasi-ballistic formalism in device compact modeling

Compact modeling for more than moore

Low-power RF modeling of a 40nm CMOS technology using BSIM6

A swept parameter technique for statistical circuit simulation

Modeling of a THz radiation detector built of planar antenna integrated with MOSFET

Unified charge model for short-channel junctionless double gate MOSFETs

Two-dimensional physics-based modeling of electrostatics and band-to-band tunneling in tunnel-FETs

Characteristic parameters evaluation of Hall cells with high performance

A compact model of AlGaN/GaN HEMTs power transistors based on a surface-potential approach

A compact model of VES-BJT device

A simple method for extraction of threshold voltage of FD SOI MOSFETs

xTCA for instrumentation

MTCA.4 LLRF system for the European XFEL

Femtosecond precision via RF Backplane in MTCA crates

MTCA fast digitizer for direct RF measurements

MTCA.4 compliant piezo driver RTM for laser synchronization

Design and preliminary evaluation of Integrated Radiation Spectrometer for longitudinal e-bunch diagnostics at FELs

Software development for uTCA-based LLRF control system

AMC frame grabber module with PCIe interface

Software components of MTCA-based image acquisition system

Design of integrated circuits and microsystems

A circuit implementation of an ultra high speed, low power analog fully programmable MFG

A continuous-time instrumentation amplifier employing a novel auto-zeroing structure

A flip-flop implementation for the DPA-resistant Delay-based Dual-rail Pre-charge Logic family

A high speed and fully tunable MFG with new programmable CMOS OTA and new MIN circuit

A simple 1 GHz non-overlapping two-phase clock generators for SC circuits

Amplifier structures in High-voltage SoI processes

An analog dual delay locked loop using coarse and fine programmable delay elements

Architecture and simulation results of a high-speed multichannel integrated circuit for optical radiation sensors

Automated design of Switched Current Sigma-Delta Modulator with a new comparator structure

CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations

Cascode amplifiers with low-gain variability using body-biasing temperature and supply compensation

Computer-aided detection of plagiarism in integrated-circuit layouts

Design and measurements results of 7-bit low-power, low area SAR A/D converter for pixel systems

Design of CMOS analog integrated readout circuit for NMOS THz detectors

Development of ionizing radiation detectors integrated with readout electronics

Double feedforward 0.6 V LNA with high gain and low noise figure

Dual stage charge-sensitive amplifier with constant-current feedback for Time-over-Threshold processing dedicated for silicon strip detectors

FPGA implementation of hybrid fixed point - Floating point multiplication

Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners

High input- and output-impedance functionality implementation in HV soi voltage buffers

NRSD8 - Neural recording and spike detection multichannel integrated circuit designed in 180nm CMOS technology

OctaLynx D: RISC microprocessor dedicated for dynamic thermal management

Optimized architecture of high order CIC filters

Technology migration of analogue CMOS circuits using hooke-jeeves algorithm and genetic algorithms in multi-core CPU systems

Tests of a readout front-end electronics for a pixel detector based on inverter amplifier

Universal design method of n-to-2n decoders

Video scaling processor targeted for low-power applications

Wide-frequency-range low-power variable-length ring oscillator in UMC CMOS 0.18 µm

Thermal issues in microelectronics

A set of temperature sensors and maximum temperature selection circuit

Distributed electrothermal modeling methodology for MOS gated power devices simulations

Extension of thermal influence coefficients method to frequency domain

Influence of Scaling on IC Temperature in FinFET Microprocessor Technologies

Measuring system for determining thermal parameters of semiconductor devices

Numerical modeling of passive low temperature co-fired ceramics coolers using design of the experiment

Parameter-based temperature-controlled oscillator driven by optimum control of throughput method

The dc measurement method of thermal resistance of IGBTs

Analysis and modelling of ICs and microsystems

A discrete model of the DC charge-up phase in RFID rectifiers

An analysis of full adder cells for low-power data oriented adders design

Application of a genetic algorithm for dimension optimization of the MEMS-based accelerometer

Behavioral parameterized SPICE models of photovoltaic modules

Characterization of transistors fabricated in evolving lapis semiconductor silicon-on-insulator 0.2µm technology

Closed-loop oscillator circuit for piezoresistive carbon nanotube NEMS resonators

Power network transient stability electronics emulator using mixed-signal calibration

Sensitivity simulative evaluation methodology in 315/433MHz RKE system

Variability-aware gradual aging for generating reliability figures of a neural measurement system

Microelectronics Technology and packaging

Comparison of commercial brands of PEDOT:PSS in electric “capattery” integrated in textile structure

Design space of twin gate junctionless vertical slit field effect transistors

Heavily doped junctionless vertical slit FETs with slit width Below 20 nm

Testing and reliability

A logic level countermeasure against CPA side channel attacks on AES

On in-system programming of non-volatile memories

Reliability study on technology trends beyond 20nm

Power electronics

A single-chip integration approach of switching cells suitable for medium power applications

Analysis in commutation of a new high voltage thyristor structure for high temperature

Calculation of dynamic MPP-tracking efficiency of PV-inverter using recorded irradiance

Parameter estimation of the electrothermal model of the ferromagnetic core

Report on efficiency of field-installed PV-inverter with focus on radiation variability

SiC power JFET electrothermal macromodel

Signal processing

A method of initial search region reduction for acoustic localization in distributed systems

Application of Hilbert-Huang transform to engine knock detection

Digital fractional-order control of a position servo

Efficient image processing application using residue number system

Fast prototyping of automatic real-time event detection facilities for video monitoring using DSP module

Hardware implementation of the PBAS foreground detection method in FPGA

High performance FPGA-based implementation of a parallel multiplier-accumulator

Influence of delay mismatch on digital predistortion for power amplifiers

Embedded systems

Analysis of timing resources for highly predictable real-time systems models

Autonomous wireless sensor network for greenhouse environmental conditions monitoring

IEEE 802.15.4 wireless network application in real-time automation systems

Smartphone application for automatic classification of environmental sound

Medical applications

4-D fuzzy connectedness-based medical image segmentation technique

Application of olfactory event-related potentials for diagnosis of neurodegenerative diseases

Architecture design of the high integrated System-on-Chip for biomedical applications

Classification support algorithms for patient's general condition based on Artificial Neural network

Design of wide band OOK transmitter for biomedical applications

FATE: One step towards an automatic aging people fall detection service

Optimization model for risk stratification of sudden cardiac death

REMPARK: When AI and technology meet Parkinson Disease assessment

System for multichannel recording of the electrophysiological activity of a brain tissue in-vivo

Student projects

A 2.3-dB NF CMOS low voltage LNA optimized for medical applications at 600MHz

An optimized algorithm for recognition of complex patterns based on artificial neural network

Analythical characterization of variable width integrated spiral inductors

Beam intensity measurements in the Large Hadron Collider

Comparative analysis of pseudo random signals of the LFSR and DLFSR generators

Laboratory setup for investigation of MPPT algorithms of photovoltaic modules under non-uniform insolation

Medicament dispensation system with patient supervision

Mobile device for quantitative sensory testing

Mobile Robot Platform for Real-Time search Algorithms

Project and realization of a two-wheels balancing vehicle

The sundial based sun-tracking system with AVR microcontroller

Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012

Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011

Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010

2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems

2008 15th International Conference on Mixed Design of Integrated Circuits and Systems

2007 14th International Conference on Mixed Design of Integrated Circuits and Systems

Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.

Efficient image processing application using residue number system

Content Provider	IEEE Xplore Digital Library
Author	Younes, D. Steffan, P.
Copyright Year	2013
Description	Author affiliation: Dept. of Microelectron., Brno Univ. of Technol., Brno, Czech Republic (Younes, D.; Steffan, P.)
Abstract	This paper presents an implementation of a digital image processing application on the field programmable gate array (FPGA) using the residue number system (RNS). This application includes applying a number of filters in spatial domain, such as sharpen, edge detection and enhancing on a gray-scale image. All the processing is done using the RNS instead of the binary number system. The proposed work proves that using the RNS results in faster and power-reduced image filtering applications. Moreover, this paper highlights the negative effect of using improper moduli sets in RNS based image-processing applications.
Starting Page	468
Ending Page	472
File Size	510154
Page Count	5
File Format	PDF
e-ISBN	9788363578022
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-06-20
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Department of Microelectronics and Computer Science, Technical University of Lodz
Subject Keyword	digital image processing Power demand Filtering Digital images Image edge detection power reduction Dynamic range Gray-scale image filtering Residue number system spatial domain
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in