NDLI: FPGA implementation of chaotic pseudo-random bit generators

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2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)

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Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012

Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012 [Front covers]

International programme committee

Table of contents

General invited papers [breaker page]

Ballistic transport in nanoscale devices

Simulation and modeling of nanoscale multiple-gate SOI MOSFETs

Transistor and interconnect modeling for design of carbon nanotube integrated circuits

Trends and challenges in micro- and nanoelectronics for the next decade

Compact modeling support for nanoscaled IC technology and design

Analog circuits sizing using the fixed point iteration algorithm with transistor compact models

Analytical drain current core model for undoped double gate MOS transistor

Analytical model for predicting subthreshold slope improvement versus negative swing of S-shape polarization in a ferroelectric FET

Characterization of parameter variability and correlations for FD SOI CMOS technology

Impact ionization effect in deep submicron MOSFET features simulation

KLU sparse direct linear solver implementation into NGSPICE

Simulation study of nanoscale double-gate CMOS circuits using compact advanced transport models

Standardization of multigate MOSFET modeling

Time-domain waveform based extraction of FinFET nonlinear I–V model

Two-dimensional physics-based modeling of dopant-segregated Schottky barrier UTB MOSFETs

Verilog-a compact semiconductor device modelling and circuit macromodelling with the QucsStudio-ADMS “turn-key” modelling system

Especial TRAMS (terascale reliable adaptive memory systems) project

Enhancing 6T SRAM cell stability by back gate biasing techniques for10nm SOI FinFETs under process and environmental variations

Mitigating lower layer failures with adaptive system reconfiguration

SRAM lifetime improvement by using adaptive proactive reconfiguration

Strain relevance on the improvement of the 3T1D cell performance

Variability and reliability analysis of CNFET in the presence of carbon nanotube density fluctuations

Technologies towards cognitive transceivers - Par4CR project

Digital hardware resources for steering a nonlinear interference suppressor

LINC architecture: A discussion

xTCA for instrumentation

Development of uTCA hardware for BAM system at FLASH and XFEL

FMC-based neutron and gamma Radiation Monitoring Module for xTCA applications

Image Acquisition Module for uTCA systems

Image visualisation and processing in DOOCS and EPICS

Design of integrated circuits and microsystems [breaker page]

A balun transimpedance amplifier with adjustable gain for integrated SPO2 optic sensors

A calibratable capacitance array based approach for high resolution CR SAR ADCs

A charge pump with power-on reset circuit

A high speed A/D converter for using in low power CMOS image sensors

A high speed two-stage dual-path operational amplifier in 40nm digital CMOS

A low noise low offset current mode instrumentation amplifier

A novel charge recycling approach to low-power circuit design

A switched-capacitor implementation of short-term synaptic dynamics

Area efficient front-end readout electronics for pixel detector based on inverter amplifier

Area efficient low power neural amplifiers using MOS and MIM capacitors in submicron technologies for ultra low corner frequencies

Convex combination initialization method for kohonen neural network implemented in the CMOS technology

Crystal oscillator with dual amplitude stabilization feedback loop

Dc-gain enhanced fast-settling triple folded cascode op-amp

Design of a fully programmable analog interval type-2 triangular/trapezoidal fuzzifier

Design of an analog output buffer for Active Matrix displays using low-temperature polycrystalline silicon thin-film transistors

Fast-settling gain stage using replica amplification for high performance pipeline ADCs

FPGA implementation of chaotic pseudo-random bit generators

Fully integratable 4-phase charge pump architecture for high voltage applications

High-resolution hold-off time control circuit for geiger-mode avalanche photodiodes

Integrated circuit for wireless inductive powering implemented in 180nm CMOS process

RF varactor design based on evolutionary algorithms

Temperature and supply voltage compensated biasing for digitally controlled oscillators

Wideband low-noise RF front-end for CNT-NEMS sensors

Thermal issues in microelectronics [breaker page]

1/f noise temperature behaviour of poly resistors

Compensation of the temperature fluctuations in the silicon photomultiplier measurement system

DC measurements method of the thermal resistance of power MOSFETs

Overheat security system for high speed embedded systems

Paths of the heat flow from semiconductor devices to the surrounding

Technology migration and thermal coupling

Thermal models for dynamic clock control

Thermographic measurements of planar inductors

Analysis and modelling of ICs and microsystems [breaker page]

A specific parameters analysis of CMOS hall effect sensors with various geometries

Combined hardware and software tracing of real and virtual embedded system parts

Conducted emissions susceptibility study for an high precision LDO

Device-circuit models for extreme environment space electronics

Estimating the impact of complete analog channel selection on zero-IF multi-standard radio receivers power consumption

Extracting the parameters of an EEHEMT nonlinear model for InP HEMT operating at G-band frequency

Joint simulation of mixed-signal integrated circuits and printed circuit boards

Methodology for development of LVS and LPE rule sets adapted for MEMS processes

Modeling and optimization of a Ker charge pump loaded by a resistive circuit

Offset compensation for voltage- and current amplifiers with CMOS inverters

Surface potential model of a high-k HfO2-Ta2O5 capacitor

Symbolic analysis in gyrator-capacitor filters

Technology and device design and optimization for the MOSFET hall sensor on SOI structure

Verilog-A modeling of electrical circuit with adding element based on branched hydrogen bonding network

Microelectronics technology and packaging [breaker page]

Characterization of test devices for development of nanowire sensor FETs

Design model and data management for 3D integration technologies

Multisensor system for monitoring human psychophysiologic state in extreme conditions with the use of microwave sensor

Testing and reliability [breaker page]

Determining effective testability degree of analog circuits

DFT for analog and mixed signal IC based on IDDQ scanning

GNU radio and USRP2 as a universal platform for verification of wireless communication devices used in automotive applications

On-chip parametric test of binary-weighted R-2R ladder D/A converter and its efficiency

Reliable on-chip network design using an agent-based management method

Power electronics [breaker page]

Survey and analysis of the design issues of a low cost micro power DC-DC step up converter for indoor light energy harvesting applications

The effect of thermal inertia in photovoltaic module simulation

Signal processing [breaker page]

A hierarchical algorithm for moving vehicle identification based on acoustic noise analysis

Application of the newton method to first-order implicit fractional transfer function approximation

Combining sound source tracking algorithms based on microphone array to improve real-time localization

Design and implemetation of a monopulse radar signal processor

Fractional delay filter design with extracted window offsetting

Measurement of settling time of high-speed D/A converters

Realtime physics engine for robots movement

Embedded systems [breaker page]

Digital hardware for prime numbers generation

Hierarchical UML activity diagrams into control interpreted petri nets transformation

Wireless communication solutions for distributed strain measure systems in mechanical structures

Medical applications [breaker page]

Automatisation of computer-aided burn wounds evaluation

Low power system for measurement of skin conductance and temperature of patient body

Prediction of fatigue and sleep onset using HRV analysis

Student projects [breaker page]

A 6-bit 122 MS/s digital-to-analog converter for contactless applications in CMOS 90 nm technology

Application of the DLFSR generators in spread spectrum communication

FPGA implementation of an evolutionary algorithm based charge management for electric vehicles

Programmable gain amplifier for 13.5 6 MHz radio receiver in CMOS 90 nm technology

Switched capacitor low noise voltage converter design strategies in 90 nm CMOS process

Index of authors

Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011

Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010

2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems

2008 15th International Conference on Mixed Design of Integrated Circuits and Systems

2007 14th International Conference on Mixed Design of Integrated Circuits and Systems

Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.

FPGA implementation of chaotic pseudo-random bit generators

Content Provider	IEEE Xplore Digital Library
Author	Dabal, P. Pelka, R.
Copyright Year	2012
Description	Author affiliation: Faculty of Electronics, Military University of Technology, Warsaw, Poland (Dabal, P.; Pelka, R.)
Abstract	We present recent results of our studies on the FPGA implementation of pseudo-random bit generators (PRBGs) based on a chaotic behavior of nonlinear systems. A number of different PRBG architectures have been considered, including logistic mapping, Hénon mapping, and frequency dependent negative resistor (FDNR). All versions of PRBGs have been implemented in five FPGA families of devices from Xilinx (Spartan 3 and 6, Virtex 4, 5, and 6). We present detailed comparison of FPGA resources required for PRBG implementation and evaluation of maximum operating frequencies. The pseudo-random bit generators presented in this paper can be used for key generation in stream ciphers in secure, real-time transmission of digital signals.
Starting Page	260
Ending Page	264
File Size	323317
Page Count	5
File Format	PDF
ISBN	9781457720925
e-ISBN	9788393207589
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-24
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Dept of Microelectronics
Subject Keyword	chaotic systems Chaotic communication Generators Table lookup pseudo-random bit generator Field programmable gate arrays Equations Hénon map Logistics logistic map
Content Type	Text
Resource Type	Article

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