NDLI: Novel hybrid CMOS and CNFET inverting amplifier design for area, power and performance optimization

Content Provider	IEEE Xplore Digital Library
Author	Usmani, F.A. Hasan, M.
Copyright Year	2009
Description	Author affiliation: Department of Electronics Engineering, Aligarh Muslim University, India (Usmani, F.A.; Hasan, M.)
Abstract	There is a pressing need to explore circuit design ideas in new emerging technologies in deep-submicron in order to exploit their full potential during the early stages of their development. Carbon nanotube based technology (CNT) has significant potential to replace silicon technology sometimes in the future. This paper presents an optimal design of hybrid CMOS and carbon nanotube field effect transistor (CNFET) based complementary type inverting amplifier for area-power-performance optimization in terms of operating voltage, number of nanotubes, diameter and pitch of the CNFET along with the qualitative explanation of the obtained results at an operating voltage of 0.9V using HSPICE simulations. Furthermore, comparison of hybrid technology amplifiers with planar CMOS at the 32nm technology node showed that the performance of PMOS-NCNFET configuration is better in terms of Gain (62% higher), GBP (fT, 181% higher), slew rate (163% higher) etc. while PCNFET-NMOS outperforms in terms of Gain (59% higher), Bandwidth (332% higher), GBP (395%), Output resistance (328% lower) for typical load capacitance (CL=1fF) at the cost of higher power consumption.
Starting Page	1
Ending Page	5
File Size	3148792
Page Count	5
File Format	PDF
ISBN	9781424438310
DOI	10.1109/EDST.2009.5166110
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-06-01
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Carbon nanotube field effect transistor (CNFET) Ballistic Performance gain Carbon nanotubes hybridization Optimization Power amplifiers Chirality Voltage Pressing CMOS technology Silicon Circuit synthesis CNTFETs single wall nanotube (SWNT)
Content Type	Text
Resource Type	Article

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