NDLI: Fast automatic fundus images registration and mosaic based on Compute Unified Device Architecture

Content Provider	IEEE Xplore Digital Library
Author	Wang, Yuliang Chen, Zhaoying Liu, Xianxi Shen, Jianxin
Copyright Year	2015
Description	Author affiliation: College of Mechanical and Electrical Engineering, Nanjing University of Aeronautics & Astronautics, Nanjing, China (Shen, Jianxin) \|\| College of Mechanical and Electrical Engineering, Shandong Agriculture University, Taian, China (Wang, Yuliang; Chen, Zhaoying; Liu, Xianxi)
Abstract	In order to overcome the characteristics of low contrast, non-uniform illumination, limited field of view (FOV), and the geometric distortion between different FOV of the fundus images, a fast automatic fundus image registration and mosaic algorithm based on Compute Unified Device Architecture (CUDA) is presented. Firstly fundus images are enhanced by homomorphism filtering, then the Scale Invariant Feature Transform (SIFT) features in effective FOV are extracted and matched between images with CUDA speeded up. With CUDA application, point pairs are purified using random sample consensus (RANSAC) algorithm employed perspective model, transformation matrixes are computed according to the matching point pairs of surrounding FOV images to the central, image registration and image fusion is implemented to get fundus panoramic image finally. The automatic registration and mosaic results of multiple FOV images obtained by fundus camera show that the algorithm is robust and stability with registration accuracy up to pixel level, the algorithm speed upgrade 10 to 30 times, high-precision automatic fundus image mosaic can be achieved.
Starting Page	275
Ending Page	280
File Size	667836
Page Count	6
File Format	PDF
e-ISBN	9781467390989
DOI	10.1109/CISP.2015.7407889
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-10-14
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Image registration scale invariant feature transform(SIFT) image registration Graphics processing units Computer architecture images mosaic Parallel processing Feature extraction compute unified device architecture(CUDA) Acceleration Kernel
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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