NDLI: Implementation of Fast Fourier and Inverse Fast Fourier Transforms in FPGA

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2006 IEEE 14th Signal Processing and Communications Applications

Proceedings of the IEEE 13th Signal Processing and Communications Applications Conference, 2005.

Proceedings of the IEEE 12th Signal Processing and Communications Applications Conference, 2004.

Implementation of Fast Fourier and Inverse Fast Fourier Transforms in FPGA

Content Provider	IEEE Xplore Digital Library
Author	Az, I. Sahin, S. Cavuslu, M.A.
Copyright Year	2007
Description	Author affiliation: Kocaeli Univ., Izmit (Az, I.)
Abstract	This article explains implementing of fast Fourier (FFT) and inverse fast Fourier transform (IFFT) algorithms in FPGA. The reason of designing the study on FPGA base is that FPGAs are able to rearrange of logical blocks and moreover, mathematical algorithms can confirm faster by means of parallel data processing. For operating these algorithms, it was used the family of Xilinx Virtex2P xc2vp30fg676-7 FPGA device as a hardware in this study. In programming the hardware and writing codes, VHDL was used. The results show that FFT and IFFT algorithms result in 0.6 mus and 0.72 mus cycle time respectively.
Starting Page	1
Ending Page	4
File Size	2211648
Page Count	4
File Format	PDF
ISBN	1424407192
DOI	10.1109/SIU.2007.4298559
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-11
Publisher Place	Turkey
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis FPGA WiMAX Donanimsal HFD ve THFD VHDL Fast Fourier transforms Gaussian processes Digital signal processing Writing Bismuth Hardware Model driven engineering Field programmable gate arrays
Content Type	Text
Resource Type	Article

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