NDLI: Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAs

Content Provider	IEEE Xplore Digital Library
Author	Sasdrich, P. Moradi, A. Mischke, O. Guneysu, T.
Copyright Year	2015
Description	Author affiliation: Horst Gortz Inst. for IT-Security, Ruhr-Univ. Bochum, Bochum, Germany (Sasdrich, P.; Moradi, A.; Mischke, O.; Guneysu, T.)
Abstract	Reconfigurability is a unique feature of modern FPGA devices to load hardware circuits just on demand. This also implies that a completely different set of circuits might operate at the exact same location of the FPGA at different time slots, making it difficult for an external observer or attacker to predict what will happen at what time. In this work we present and evaluate a novel hardware implementation of the lightweight cipher PRESENT with built-in side-channel countermeasures based on dynamic logic reconfiguration. In our design we make use of Configurable Look-Up Tables (CFGLUT) integrated in modern Xilinx FPGAs to nearly instantaneously change hardware internals of our cipher implementation for improved resistance against side-channel attacks. We provide evidence from practical experiments based on a Spartan-6 platform that even with 10 million recorded power traces we were unable to detect a first-order leakage using the state-of-the-art leakage assessment.
Starting Page	130
Ending Page	136
File Size	7761442
Page Count	7
File Format	PDF
ISBN	9781467374217
DOI	10.1109/HST.2015.7140251
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-05-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Ciphers Hardware Registers Table lookup Encryption Field programmable gate arrays
Content Type	Text
Resource Type	Article

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