NDLI: A block adaptive predistortion algorithm for transceivers with long transmit-receive latency

Content Provider	IEEE Xplore Digital Library
Author	Santucci, R. Spanias, A.
Copyright Year	2010
Description	Author affiliation: SenSIP center at the School of Electrical, Computer, and Energy Engineering; Arizona State University; Tempe, 85287-5706, USA (Santucci, R.; Spanias, A.)
Abstract	The purpose of this paper is to introduce digital predistortion and propose a new digital predistortion scheme for use in systems with lengthy transmit-receive delays. The introduction discusses the motivation to implement digital predistortion within a wireless transceiver system. Then, we introduce techniques commonly found in the literature and the assumptions made in their operation. Finally, a new scheme is proposed which allows consideration of multiple measurements of actual data between predistorter updates. This is beneficial when there is a significant latency after each update before new results can be measured. This new scheme utilizes a block least-mean-squares algorithm, running within a gain-based look-up-table predistorter. The proposed scheme demonstrates a reduction in the time required for power amplifier linearization.
Starting Page	1
Ending Page	6
File Size	3835560
Page Count	6
File Format	PDF
ISBN	9781424462858
e-ISBN	9781424462872
DOI	10.1109/ISCCSP.2010.5463448
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-03-03
Publisher Place	Cyprus
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	High power amplifiers OFDM Cellular phones Signal processing algorithms Power amplifiers Bandwidth Predistortion Transceivers Least squares approximation Delay
Content Type	Text
Resource Type	Article

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