NDLI: Wireless integrated circuit for 100-channel neural stimulation

Content Provider	IEEE Xplore Digital Library
Author	Thurgood, B.K. Ledbetter, N.M. Warren, D.J. Clark, G.A. Harrison, R.R.
Copyright Year	2008
Description	Author affiliation: Univ. of Utah, Salt Lake City, UT (Thurgood, B.K.; Ledbetter, N.M.; Warren, D.J.; Clark, G.A.; Harrison, R.R.)
Abstract	We present the design of an integrated circuit for wireless neural stimulation, along with bench-top and in-vivo experimental results. The chip has the ability to drive 100 individual stimulation electrodes with constant-current pulses of varying amplitude, duration, interphasic delay, and repetition rate. The stimulation is done using a biphasic (cathodic and anodic) current source, injecting and retracting charge from the nervous system. Wireless communication and power are achieved over a 2.765-MHz inductive link. Only two off-chip components are needed to operate the stimulator: a 10-nF capacitor to aid in power supply regulation and a coil for power and command reception. The chip was fabricated in a commercially available 0.6-mum 2P3M BiCMOS process. The chip was able to activate motor fibers to produce muscle twitches via a Utah Slanted Electrode Array implanted in cat sciatic nerve, and to activate sensory fibers to recruit evoked potentials in somatosensory cortex.
Starting Page	129
Ending Page	132
File Size	461496
Page Count	4
File Format	PDF
ISBN	9781424428786
DOI	10.1109/BIOCAS.2008.4696891
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-20
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrodes Wireless communication Coils Optical fiber sensors Power supplies Capacitors Nervous system BiCMOS integrated circuits Delay Sensor arrays
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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