NDLI: Design Space Exploration of a Reconfigurable HMAC-Hash Unit

Content Provider	IEEE Xplore Digital Library
Author	Khan, E. Watheq El-Kharashi, M. Gebali, F. Abd-El-Barr, M.
Copyright Year	2006
Description	Author affiliation: Victoria Univ., Victoria (Khan, E.; Watheq El-Kharashi, M.; Gebali, F.; Abd-El-Barr, M.)
Abstract	In this paper, a design space exploration of a reconfigurable HMAC-hash unit is discussed. This unit implements one of six standard hash algorithms, namely, MD5, SHA-1, RIPEMD-160, HMAC-MD5, HMAC-SHA-1, and HMAC-RIPEMD-160. The design space exploration of this unit is done using the Handel-C language. We propose key reuse mechanism for successive messages in order to improve the HMAC throughput. In addition, we explore the design space by providing two implementations of the HMAC algorithm, one for a general key size and another for a fixed key size. In each implementation, we use standard key use and the proposed key reuse mechanisms, and that results in four different implementations. The performance of these four implementations is analyzed with respect to three design metrics: area, delay, and throughput. We found that the proposed key reuse mechanism improves the HMAC throughput significantly when a large key is reused, with negligible increase in area and delay. In addition, we found that the implementation of HMAC for fixed key size is better in area, delay, and throughput than the HMAC implementation for general key size.
Starting Page	1
Ending Page	1
File Size	79895
Page Count	1
File Format	PDF
ISBN	0780397703
DOI	10.1109/ITICT.2006.358283
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-12-10
Publisher Place	Egypt
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis IPSec Design Space Exploration Design engineering Hash Functions Authentication HMAC Throughput Space exploration Performance analysis Delay
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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