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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Cret, O. Suciu, A. Gyorfi, T. |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Comput. Sci., Tech. Univ. of Cluj-Napoca, Cluj-Napoca, Romania (Cret, O.; Suciu, A.; Gyorfi, T.) |
| Abstract | Field programmable gate arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. For all such systems, random numbers are essential. One of the most well-known methods for producing true random number sequences in FPGAs is based on the phenomenon of jitter and built upon ring oscillators. This paper describes how to overcome the placement sensitivity caused by the different physical properties of the logic elements, thus extending the portability of TRNGs on various FPGA boards. Our design offers an easy implementation, but in the same time maintains the good quality and high generation throughput of random numbers. |
| Starting Page | 433 |
| Ending Page | 438 |
| File Size | 285394 |
| Page Count | 6 |
| File Format | |
| ISBN | 9780769535234 |
| DOI | 10.1109/SYNASC.2008.26 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-09-26 |
| Publisher Place | Romania |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Ring oscillators Semiconductor device noise Chaos Scientific computing FPGA sampling implementation Jitter Throughput high quality high throughput TRNG Sampling methods Cryptography ring oscillator Field programmable gate arrays Random number generation |
| Content Type | Text |
| Resource Type | Article |
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