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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hsin-Hsiung Huang Yu-Cheng Lin Hui-Yu Huang Tsai-Ming Hsieh |
| Copyright Year | 2007 |
| Description | Author affiliation: Chung Yuan Christian Univ., Chang-Li (Hsin-Hsiung Huang) |
| Abstract | In this paper, we propose a hybrid algorithm to obtain the routing tree with obstacles. The algorithm divides the chip into a set of sub-regions and applies the proper method for each sub-region. First, two density functions are used to determine the density of the sub-regions and judge whether the chip or sub-region should be divided. Then, the proper algorithm is selected to construct the routing tree of each sub-region. So far, we develop two different routing algorithms with the different objective functions. The former that is based on the spanning-graph minimizes total wirelength with the long runtime. The latter is presented to speedup runtime while the total wirelength is very long. Finally, all sub-trees of the sub-regions are connected with the shortest paths. In other words, the hybrid method is presented to make tradeoff between total wirelength and runtime. Compared to (Feng et al., 2005), hybrid method improves total wirelength by 38.3% with accepted runtime. |
| Starting Page | 172 |
| Ending Page | 175 |
| File Size | 4973730 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424407965 |
| DOI | 10.1109/ISICIR.2007.4441825 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-09-26 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Algorithm design and analysis Computer science Runtime Tree graphs Routing Density functional theory Partitioning algorithms Pins Timing Electronic commerce |
| Content Type | Text |
| Resource Type | Article |
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