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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chung-Wei Lin Szu-Yu Chen Chi-Feng Li Yao-Wen Chang Chia-Lin Yang |
| Copyright Year | 1982 |
| Abstract | Given a set of pins and a set of obstacles on a plane, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects these pins, possibly through some additional points (called the Steiner points), and avoids running through any obstacle to construct a tree with a minimal total wirelength. The OARSMT problem becomes more important than ever for modern nanometer IC designs which need to consider numerous routing obstacles incurred from power networks, prerouted nets, IP blocks, feature patterns for manufacturability improvement, antenna jumpers for reliability enhancement, etc. Consequently, the OARSMT problem has received dramatically increasing attention recently. Nevertheless, considering obstacles significantly increases the problem complexity, and thus, most previous works suffer from either poor quality or expensive running time. Based on the obstacle-avoiding spanning graph, this paper presents an efficient algorithm with some theoretical optimality guarantees for the OARSMT construction. Unlike previous heuristics, our algorithm guarantees to find an optimal OARSMT for any two-pin net and many higher pin nets. Extensive experiments show that our algorithm results in significantly shorter wirelengths than all state-of-the-art works. |
| Sponsorship | IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society |
| Starting Page | 643 |
| Ending Page | 653 |
| Page Count | 11 |
| File Size | 945378 |
| File Format | |
| ISSN | 02780070 |
| Volume Number | 27 |
| Issue Number | 4 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-04-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Routing Pins Steiner trees Manufacturing Tree graphs Heuristic algorithms Large-scale systems Computer science NP-complete problem Timing Steiner tree Physical design routing spanning tree |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software |
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