NDLI: Dependability Assessment for the Selection of Embedded Cores

Content Provider	IEEE Xplore Digital Library
Author	de Andres, D. Ruiz, J.-C. Gil, D. Gil, P.
Copyright Year	2008
Description	Author affiliation: Fault Tolerant Syst. Res. Group, Univ. Politec. de Valencia, Valencia (de Andres, D.; Ruiz, J.-C.; Gil, D.; Gil, P.)
Abstract	Many designers bet on reducing time-to-market costs by integrating off-the-shelf (OTS) cores in their embedded solutions, while looking after maintaining the confidence placed by users in their products. Balancing these aspects is challenging and claims for suitable techniques to select, among eligible candidates, those exhibiting adequate levels of dependability. Thus, the early and efficient dependability assessment of embedded cores is nowadays a major and complex challenge. This paper focuses on the assessment and comparison of dependability attributes evinced by hardware OTS cores. It proposes the use of field programmable gate arrays to emulate the cores behaviour under different execution profiles (workloads and faultloads). Three cores devoted to signal filtering purposes are considered as a case study. Results show not only the feasibility of this approach but also the kind of selection process supported by the proposed technique.
Starting Page	79
Ending Page	84
File Size	13356777
Page Count	6
File Format	PDF
ISBN	9780769531380
DOI	10.1109/EDCC-7.2008.19
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-07
Publisher Place	Lithuania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Manufacturing processes Embedded system Emulation Time to market Routing Hardware Proposals Gas insulated transmission lines Field programmable gate arrays
Content Type	Text
Resource Type	Article

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