NDLI: 900 MHz band class E PA using high voltage n-channel transistors in standard CMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Herrera, J.A. Del Valle, J.L.
Copyright Year	2005
Description	Author affiliation: Electron. Design Group, Mexico City, Mexico (Herrera, J.A.)
Abstract	The operation of a single ended CMOS class E power amplifier imposes voltage stresses on the drain terminal of the switching transistor that preclude the use of large bias drain voltages. On this paper, it is presented a design of a high voltage n-channel transistor compatible with CMOS technology that avoids the above limitation. A design methodology based on physical models, which allows the comparison of class E power amplifiers performance, is also presented for the low voltage versus the high voltage options. Simulation results using BSIM3 V3.2, including components losses and a finite feed inductor topology, show that the high voltage approach is the best option to meet an output power design specification of 25 dBm at 900 MHz.
Starting Page	400
Ending Page	403
File Size	175335
Page Count	4
File Format	PDF
ISBN	0780392302
DOI	10.1109/ICEEE.2005.1529654
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-09-09
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Operational amplifiers CMOS RF High power amplifiers Design methodology Inductors Stress Semiconductor device modeling Low voltage Power amplifiers CMOS technology class E operation Feeds high voltage CMOS
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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