NDLI: A viable multi-conductor spiral inductor on silicon substrate with effective shielding

Content Provider	IEEE Xplore Digital Library
Author	Chiang, Meng-Ju Lee, Meng-Lin Tzuang, Ching-Kuang C.
Copyright Year	2009
Description	Author affiliation: Graduate Iinstitute of Communication Engineering, National Taiwan University, Taipei 106, Taiwan (Lee, Meng-Lin; Tzuang, Ching-Kuang C.) \|\| Department of Antenna and Wireless System Integration, HTC Corporation, Xindian City, Taipei County 231, Taiwan (Chiang, Meng-Ju)
Abstract	A viable multi-conductor spiral inductor on the silicon substrate with effective shielding is presented. The synthetic edge-coupled transmission line (TL), which is operated in the even-mode, is applied to realize the spiral inductor and provide the mesh ground shielding on the conventional silicon substrate for a well-defined interface with the system integration. The spiral inductor is fabricated by the 0.18-μm 1P6M CMOS technology. The measured results of the proposed shielded inductor reveal the inductance of 0.39 nH and Q-factor of 4.9 at 16.0 GHz, respectively, indicating 13.5% higher and 16.1% lower than that of the conventional design without ground shielding. The electromagnetic coupling between the two adjacent spiral inductors with edge-to-edge spacing of 80.0 μm is 70.0-to-80.0 dB from 0.1 GHz to 5.0 GHz, indicating approximate 50.0 dB improvement against conventional design with the same distance.
Starting Page	140
Ending Page	143
File Size	282582
Page Count	4
File Format	PDF
ISBN	9781424450312
DOI	10.1109/RFIT.2009.5383746
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-01-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS Spirals Power transmission lines transmission line (TL) Silicon Spiral inductor CMOS integrated circuits Inductors Integrated circuit modeling Substrates substrate noise coupling
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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