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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Scheibler, K. Becker, B. |
| Copyright Year | 2014 |
| Description | Author affiliation: Univ. of Freiburg, Freiburg, Germany (Scheibler, K.; Becker, B.) |
| Abstract | This work is motivated by (1) a practical application which automatically generates test patterns for integrated circuits and (2) the observation that off-the-shelf state-of-the-art pseudo-Boolean solvers have difficulties in solving instances with huge pseudo-Boolean constraints as created by our application. Derived from the SMT solver iSAT3 we present the solver iSAT3p that on the one hand allows the efficient handling of huge pseudo-Boolean constraints with several thousand summands and large integer coefficients. On the other hand, experimental results demonstrate that at the same time iSAT3p is competitive or even superior to other solvers on standard pseudo-Boolean benchmark families. |
| Starting Page | 203 |
| Ending Page | 206 |
| File Size | 502110 |
| Page Count | 4 |
| File Format | |
| ISBN | 9780983567844 |
| DOI | 10.1109/FMCAD.2014.6987614 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-10-21 |
| Publisher Place | Switzerland |
| Access Restriction | Subscribed |
| Rights Holder | FMCAD and the authors |
| Subject Keyword | Integrated circuits Boolean functions Iterative closest point algorithm Benchmark testing Data structures Encoding Circuit faults |
| Content Type | Text |
| Resource Type | Article |
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