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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yin-He Su Ching-Hwa Cheng Shih-Chieh Chang |
| Copyright Year | 2000 |
| Description | Author affiliation: Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan (Yin-He Su) |
| Abstract | The purpose of a testability analysis program is to estimate the difficulty of testing a fault. A good measurement can give an early warning about the testing problem so as to provide guidance in improving the testability of a circuit. There have been researches attempting to efficiently compute the testability analysis. Among those, the Controllability and Observability Procedure COP (1984) can calculate the testability value of a stuck-at fault efficiently in a tree-structured circuit but may be very inaccurate for a general circuit. The inaccuracy in COP is due to the ignorance of signal correlations. The algorithm of TAIR (Testability Analysis by Implication Reasoning) proposes a testability analysis algorithm, which starts from the result of COP and then gradually improves the result by applying a set of rules. The set of rules in TAIR can capture some signal correlations and therefore the results of TAIR are more accurate than COP. In this paper, we first prove that the rules in TAIR can be replaced by a closed-form formulation. Then, based on the closed-form formulation, we proposed two novel techniques to further improve the testability analysis results. Our experimental results have shown improvement over the results of TAIR. |
| Starting Page | 392 |
| Ending Page | 397 |
| File Size | 570024 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769508871 |
| ISSN | 10817735 |
| DOI | 10.1109/ATS.2000.893655 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-12-06 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit testing Circuit faults Observability Controllability Built-in self-test Fault detection Algorithm design and analysis Automatic testing Wire Computer science |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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