NDLI: A scalable low power imager architecture for compound-eye vision sensors

Content Provider	IEEE Xplore Digital Library
Author	Boussaid, F. Chen Shoushun Bermak, A.
Copyright Year	2005
Description	Author affiliation: Sch. of Electr., Electron. & Comput. Eng., Western Australia Univ., Perth, WA, Australia (Boussaid, F.)
Abstract	In this paper, we propose a scalable low power imager architecture for compound-eye vision sensors. The proposed hardware architecture is based on a time domain data representation as well as a biologically inspired read-out strategy using address-event-representation (AER). The proposed AER approach to compound-eye imaging enables low power operation (10nA/pixel), efficient read-out, improved signal-to-noise ratio together with wide dynamic range. Moreover, the proposed AER-based VLSI architecture is scalable and well suited to the next generation of deep submicron silicon processes owing to decreased supply voltage, process variability and increased noise levels.
Sponsorship	iCore Western Econ. Diversification Canada Alberta Innovation & Sci. Ind. Canada CMC Microsystems
Starting Page	203
Ending Page	206
File Size	1038629
Page Count	4
File Format	PDF
ISBN	0769524036
DOI	10.1109/IWSOC.2005.26
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-07-20
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Image sensors Biosensors Hardware Pixel Signal to noise ratio Dynamic range Very large scale integration Silicon Dynamic voltage scaling Noise level
Content Type	Text
Resource Type	Article

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