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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chun-Lung Chen Chuen-Lung Chen |
| Copyright Year | 2006 |
| Description | Author affiliation: Dept. of Mater. & Inf. Sci., Nat. Chengchi Univ., Taipei (Chun-Lung Chen; Chuen-Lung Chen) |
| Abstract | The problem considered in this paper is a flexible flow line with multiple serial stages, where there are one or more unrelated parallel machines at each stage and there exists a bottleneck stage in the system. The objective of the scheduling problem is to minimize the total flow time of jobs. A heuristic method is proposed to solve the scheduling problem. It focuses on the bottleneck stage and a heuristic procedure is developed as part of the method to construct the schedule for the bottleneck stage. This is because the bottleneck stage may not be the first; the arrival time of jobs at the bottleneck stage may not be zero. A trial simulation is adopted to schedule the jobs at the stages ahead of the bottleneck stage so as to obtain the arrival time of jobs at the bottleneck stage. To evaluate the performance of the suggested method, the shortest processing time (SPT) dispatching rule is investigated for comparison purposes and computational experiments are performed on randomly generated test problems. Results show that the suggested method performs better than the SPT dispatching rule for various test problems |
| Sponsorship | IEEE Singapore Sect. IEEE Singapore SMC Chap. IEEE Singapore RA Chap |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 173718 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424400244 |
| DOI | 10.1109/RAMECH.2006.252673 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-06-01 |
| Publisher Place | Thailand |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Parallel machines Optimal scheduling Job shop scheduling Scheduling algorithm Dispatching Heuristic algorithms Iterative algorithms Performance evaluation Testing Simulated annealing total flow time flexibile flow line unrelated parallel machines bottleneck |
| Content Type | Text |
| Resource Type | Article |
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