NDLI: Embedded passives in organic substrate for RF module and assembly characterization

Content Provider	IEEE Xplore Digital Library
Author	Li, L.
Copyright Year	2004
Description	Author affiliation: Freescale Semicond. Inc., Tempe, AZ, USA (Li, L.)
Abstract	More functionality is being integrated in RF modules for both mobile phone and other wireless applications. For example, a RF front-end transmit power amplifier (PA) module of GSM/GPRS mobile phone could have multiple transmit-side power amplifier die, with integrated inter-stage and output matching circuitries, couplers, power level detector and control, filter, and transmit/receive switches, and various surface mount (SMT) passive components to support functions as stated in D. Cavasin et al. (2003). A Bluetooth/spl trade/ RF front-end transceiver module comprises the RF transceiver die, its external matching components, switches, filters, and other components to fulfill the complete RF radio function, which can be used for short-range communications in cellular phones, PDAs, and computer network applications according to L. Li et al. (2003). Both LTCC (low temperature co-fired ceramic) and organic substrate can be used for RF modules, driven by module cost and size reductions. The first part of the paper focused on embedding passives in organic substrate, which is in general more cost effective. A band pass filter (BPF), balun, matching network, and decoupling caps were embedded successfully in the organic substrate, which dramatically reduced module size and cost, and resulted in competitive size modules, compared to LTCC, with less cost. Currently RF modules are typically assembled in array panels, and over molded in panel form, and then singulated to individual modules. Characterization of module assembly and packaging material impact on electrical performance of the RF module is important to optimize the design and maximize electrical performance. The second part of the paper will review studies on the impact of transfer molding material on PA module performance. Three areas of study were conducted, focusing on dielectric property characterization of transfer molding compounds; EM simulation on output matching circuits with and without molding, and selective glob top experiments on various parts of the module based in L. Li et al. (2004). Critical areas on the module to cause output power (Pout) degradation were identified, which serves as a guidance for design compensation to minimize molding effects. Molding compound dielectric property is an important variable to the molding effects. Therefore, dielectric property measurement techniques and capabilities were established up to 10 GHz. Dielectric constant (Dk) and loss tangent (Df) were measured up to 10 GHz. Electromagnetic (EM) simulations on the PA module US PCS band (1850 to 1910 MHz) die output matching physical structures, including Cu transmission lines and MOS capacitors and their wirebonds, bias feeding, and daisy chain coupler before and after molding, were conducted using measured dielectric property data. Simulations show that the most sensitive area to molding are MOS capacitors and their wirebonds, which caused center band frequency shifting 31 MHz lower after molding. Selective glob top encapsulate experiments were conducted on the PA module US PCS band path, and critical areas for power-out (Pout) drop and band frequency shift were identified. MOS capacitors and their wirebonds in the output matching circuit accounted for 58% of total Pout drop after molding, and GaAs die with inter-stage matching passives on and off chip accounted for 22% of total Pout drop. Small signal gain measurements show that pass band center frequency shifted lower after glob top encapsulate the MOS capacitors and their wirebonds, which significantly dropped gain at high frequency edge of 1910 MHz. Design compensation to minimize Pout drop was used to tune module band purposely higher to account for the frequency shift after molding. Next generation die and module design was compensated, and band center was purposely shifted higher.
Starting Page	74
Ending Page	82
File Size	1184306
Page Count	9
File Format	PDF
ISBN	0780386205
DOI	10.1109/HPD.2004.1346677
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-07-03
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radio frequency Assembly Impedance matching Costs Dielectrics MOS capacitors Circuits Mobile handsets Power amplifiers Radiofrequency amplifiers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in