NDLI: Mersenne Twister Random Number Generation on FPGA, CPU and GPU

Content Provider	IEEE Xplore Digital Library
Author	Xiang Tian Benkrid, K.
Copyright Year	2009
Abstract	Random number generation is a very important operation in computational science e.g. in Monte Carlo simulations methods. It is also a computationally intensive operation especially for high quality random number generation. In this paper, we present the design and implementation of a parallel implementation of one of the most widely used random number generators, namely the Mersenne Twister. The latter is very widely used in high performance computing applications such as financial computing. Implementations of our parallel Mersenne Twister number generator core on Xilinx Virtex4 FPGAs achieve a throughput of 26.13 billion random samples per second. The paper also reports equivalent parallel software implementations running on an Intel Core 2 Quad Q9300 CPU with 8 GB RAM, using multi-threading technology and the Intel® Math Kernel Library (MKL), as well as on an NVIDIA 8800 GTX GPU. Comparative results show that our FPGA-based implementation outperforms equivalent CPU and GPU implementations by ~25x and ~9x respectively. Moreover, when using the same amount of energy, the FPGA can generate 37x and 35x more Mersenne Twister random samples than the CPU and the GPU, respectively.
Starting Page	460
Ending Page	464
File Size	398933
Page Count	5
File Format	PDF
ISBN	9780769537146
DOI	10.1109/AHS.2009.11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-07-29
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random number generation Field programmable gate arrays Hardware High performance computing Application software Concurrent computing Graphics Central Processing Unit NASA Adaptive systems random number generator Mersenne Twister FPGA
Content Type	Text
Resource Type	Article

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