NDLI: Steady state and transient thermal analyses of GaAs pHEMT devices

Content Provider	IEEE Xplore Digital Library
Author	Schwitter, B.K. Heimlich, M.C. Fattorini, A.P. Tarazi, J.
Copyright Year	2012
Description	Author affiliation: M/A-COM Technology Solutions, North Sydney, Australia (Fattorini, A.P.; Tarazi, J.) \|\| Department of Electronic Engineering, Macquarie University, North Ryde, Australia (Schwitter, B.K.; Heimlich, M.C.)
Abstract	GaAs pHEMT thermal reliability test structures are introduced which incorporate on-wafer heating using Thin Film Resistors (TFR) and a DC gate metal temperature measurement method. Results from 3D Finite Element Method (FEM) thermal simulations are compared with measurements and used to investigate the frequency response of device self-heating. Comparisons are made with existing thermal models. The influence of individual device structures on the thermal characteristics of an entire device is investigated and the epitaxial layers are seen to have a large impact on overall performance. Bias dependent self-heating, independent of thermal dissipation is observed and attributed to confinement of the thermal source as the drain voltage is increased.
Starting Page	1
Ending Page	7
File Size	760357
Page Count	7
File Format	PDF
ISBN	9781467301299
e-ISBN	9781467301305
e-ISBN	9781467301282
DOI	10.1109/WAMICON.2012.6208438
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-04-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature measurement Logic gates Metals Heating PHEMTs Gallium arsenide temperature Thermal test structure wafer level thermal modeling temperature measurement pHEMT channel
Content Type	Text
Resource Type	Article

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