NDLI: A Hierarchical Approach for Modelling an MPLS Network Using VHDL

Content Provider	IEEE Xplore Digital Library
Author	Minero-Munoz, M. Alarcon-Aquino, V.
Copyright Year	2006
Description	Author affiliation: Universidad de las Américas, Puebla (Minero-Munoz, M.)
Abstract	This paper presents a hierarchical approach for modelling an MPLS (Multi-Protocol Label Switching) network using VHDL (Very high-speed integrated circuits Hardware Description Language). The MPLS technology is used because it offers a better performance and flexibility than IP routing. Six MPLS switches are modelled and simulated as follows. A label is assigned to the IP packet header by the first switch, which indicates the route that the frame must follow in the MPLS network. This label is then used by the MPLS middle switches for its management inside the network. Four middle switches change the label depending on the destination of the packet. The final switch removes the label of the IP packet header and the frame continues its path outside the MPLS network. Simulation results show that this approach allows the simulation of large networks consisting of even 256 MPLS switches.
Starting Page	29
Ending Page	29
File Size	573279
Page Count	1
File Format	PDF
ISBN	0769525059
DOI	10.1109/CONIELECOMP.2006.7
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-03-01
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Multiprotocol label switching Switches Packet switching Integrated circuit modeling Switching circuits High speed integrated circuits Hardware design languages Integrated circuit technology Routing Circuit simulation
Content Type	Text
Resource Type	Article

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