NDLI: Power Management and Clock Generator for a Novel Passive UWB Tag

Content Provider	IEEE Xplore Digital Library
Author	Baghaei-Nejad, M. Tenhunen, H. Li-Rong Zheng
Copyright Year	2007
Description	Author affiliation: R. Inst. of Technol., Stockholm (Baghaei-Nejad, M.; Tenhunen, H.; Li-Rong Zheng)
Abstract	In this paper we present a power management and a clock generator for a novel passive UWB tag. It can be used in many applications such as radio frequency Identification (RFID), and ubiquitous wireless sensing. As same as conventional RFID, the tag captures the power from the incoming RF signal, converts to DC and stores it in a relatively big capacitor. A voltage sensor and a regulator provide stable voltage for the whole circuitry during operation mode. A clock circuitry generates a low jitter and low skew clock for ultra wideband transmitter to transmit data. In such passive system the power consumption of each block should be as low as possible. On the other hand, performance degradation across process, voltage, and temperature variation (PVT) is another problematic challenge in low power and low cost circuit implementation. In this work, the power management unit including of an RF power scavenging, a voltage sensor, a low drop out regulator and a clock generator are designed and their performance across PVT variation are analyzed. The module is designed and is fabricated in CMOS 0.18 mum technology.
Starting Page	1
Ending Page	4
File Size	5156789
Page Count	4
File Format	PDF
ISBN	9781424413676
DOI	10.1109/ISSOC.2007.4427448
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-11-20
Publisher Place	Finland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy management Clocks Power generation Voltage Circuits Radiofrequency identification Regulators CMOS technology Ubiquitous computing RFID tags
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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