NDLI: A 94GHz SPST Switch in 65nm Bulk CMOS

Content Provider	IEEE Xplore Digital Library
Author	Tomkins, A. Garcia, P. Voinigescu, S.P.
Copyright Year	2008
Description	Author affiliation: Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Toronto Univ., Toronto, ON (Tomkins, A.)
Abstract	A 3-bit lumped SPST switch that operates from DC to greater than 94 GHz has been realized in 65 nm CMOS. At 94 GHz, it provides an insertion loss of 1.6 dB and an isolation of over 30 dB. Power-handling measurements of the switch at 60 GHz show no sign of input compression up to an equipment-limited input power of +9 dBm. The circuit was demonstrated as a digitally controlled variable attenuator and as a transmit-receive switch in an array of three 94 GHz transceivers. In the latter case, the on-chip loop-back of PA signals into the LNA in each individual transceiver is possible, enabling the production testing of mm-wave transceiver functionality at IF without the requirement for high-speed signal sources or probes. Measurements of the transmit-receive switch show a return-loss better than -8 dB from 58 to 94 GHz.
Starting Page	1
Ending Page	4
File Size	826747
Page Count	4
File Format	PDF
ISBN	9781424419395
ISSN	15508781
DOI	10.1109/CSICS.2008.34
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Transceivers Insertion loss Power measurement Digital control Attenuators Switching circuits Production Circuit testing Probes
Content Type	Text
Resource Type	Article

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