NDLI: Toward a processor core for real-time capable autonomic systems

Content Provider	IEEE Xplore Digital Library
Author	Uhrig, S. Maier, S. Ungerer, T.
Copyright Year	2005
Description	Author affiliation: Inst. of Comput. Sci., Augsburg Univ. (Uhrig, S.; Maier, S.; Ungerer, T.)
Abstract	This paper proposes a processor core that allows to support the autonomic computing principles in embedded hard-real-time systems. The simultaneous multithreaded CAR-core processor features hardware-integrated scheduling schemes that isolate the hard-real-time thread from non-real-time threads. It is binary compatible with Infineon's TriCore processor and designed as IP core for a system-on-chip. The challenge for the processor design is to implement simultaneous multithreading such that a thread cannot influence the timing behavior of another thread in order to allow predictable thread execution times. Therefore new instruction issue and data memory access techniques are proposed. The autonomic computing requirements shall be implemented by autonomic managers running as helper threads in own thread slots concurrent to the real-time application. The autonomic manager threads monitor the application and decide if self-configuration, self-healing, self-optimization, or self-protection must be triggered
Starting Page	19
Ending Page	22
File Size	232133
Page Count	4
File Format	PDF
ISBN	0780393139
DOI	10.1109/ISSPIT.2005.1577063
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-12-21
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Real time systems Yarn Process design Embedded computing Processor scheduling System-on-a-chip Multithreading Timing Concurrent computing Monitoring
Content Type	Text
Resource Type	Article

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