NDLI: A 130 nm CMOS LNA for 30 GHz applications

Content Provider	IEEE Xplore Digital Library
Author	Ribeiro, R. Mendes, L. Vaz, J.C. Rosario, M.J. Freire, J.C.
Copyright Year	2011
Description	Author affiliation: Escola Superior de Tecnologia e Gestão, Instituto Politécnico de Leiria, Leiria, Portugal (Ribeiro, R.; Mendes, L.) \|\| Instituto de Telecomunicaçôes Lisboa, Portugal (Vaz, J.C.; Rosario, M.J.; Freire, J.C.)
Abstract	This paper presents the design of a 30 GHz low noise amplifier in a 130 nm CMOS technology. The amplifier is based on a cascode topology. The circuit uses autotransformers in the input and output matching networks. This design approach eliminates the necessity of the use of source degeneration and allows obtaining an ultra compact LNA. The amplifier presents a forward gain (S21) of 7.4 dB at 30 GHz with a bandwidth of 10 GHz, input and output VSWRs better than 1.22:1 and a noise figure of 3.7 dB. The LNA is unconditionally stable and consumes only 7 mW when supplied with 1.2 V. The amplifier fits an area of 0.08 $mm^{2},$ which is one of the smallest areas reported.
Starting Page	1
Ending Page	4
File Size	526448
Page Count	4
File Format	PDF
ISBN	9781424474868
e-ISBN	9781424474875
DOI	10.1109/EUROCON.2011.5929383
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-04-27
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS integrated circuits Gain Impedance matching Noise CMOS technology Noise figure cascode low noise amplifier milimeter wave
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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