NDLI: On the FPGA Implementation of HAVAL Hash Function

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On the FPGA Implementation of HAVAL Hash Function

Content Provider	IEEE Xplore Digital Library
Author	Sklavos, N. Efstathiou, C.
Copyright Year	2005
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Patras Univ. (Sklavos, N.)
Abstract	Security is a very important issue, which has attracted the interest of the research community the latest years, at a great factor. Hash functions belong to the category of encryption algorithms. In this work, a novel architecture and the VLSI implementation of HAVAL hash function is proposed. In the proposed architecture, the output length is combined with the number of transformation passes, and in this way fifteen choices for practical applications, are provided. The FPGA synthesis results of the proposed architecture are compared with other related integrations. The proposed architecture achieves high speed performance with low allocated resources
Starting Page	709
Ending Page	712
File Size	3259996
Page Count	4
File Format	PDF
ISBN	142440049X
DOI	10.1109/EURCON.2005.1630029
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-21
Publisher Place	Serbia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Cryptography Immune system Very large scale integration Data security Authentication Electronic mail Resource management Hardware Fingerprint recognition Security HAVAL Hash Function Hardware Implementation
Content Type	Text
Resource Type	Article

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