NDLI: Quantification of ISA Impact on Superscalar Processing

Content Provider	IEEE Xplore Digital Library
Author	Duran, R. Rico, R.
Copyright Year	2005
Description	Author affiliation: Dept. of Comput. Eng., Univ. de Alcala, Alcala de Henares (Duran, R.; Rico, R.)
Abstract	The differences found between the superscalar performance in x86 and non-x86 processors and the peculiar characteristics of the x86 ISA recommend to carry out a thorough analysis of the available parallelism at the machine language layer. However, computer architecture evaluation requires new tools that complement the customary simulations and, in this sense, the traditional graph theory can help to create a new frame for fine-grain parallelism analysis. We construct the matrix representation associated to the data dependence graph of execution traces. In this paper, we explain how this matrix characterizes the corresponding code in a mathematical manner, fulfills a number of properties and restrictions, and provides information about the ability of the code to be processed concurrently. Besides, we also show how different data dependence sources can be composed, thus providing a mechanism to explore their final influence on the parallelism degree. These techniques are applied to an example from which some conclusions are derived
Starting Page	701
Ending Page	704
File Size	1361030
Page Count	4
File Format	PDF
ISBN	142440049X
DOI	10.1109/EURCON.2005.1630027
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-21
Publisher Place	Serbia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Instruction sets Parallel processing Analytical models Computer architecture Computational modeling Graph theory Physical layer Computer Society Performance analysis Computer simulation graph theory Instruction set design
Content Type	Text
Resource Type	Article

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