NDLI: Construction of EIRA codes with enlarged dual diagonal distance by EXIT charts

Content Provider	IEEE Xplore Digital Library
Author	Jianrong Bao Minjian Zhao Jie Zhong Yunlong Cai
Copyright Year	2013
Description	Author affiliation: Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China, 310027 (Jianrong Bao; Minjian Zhao; Jie Zhong; Yunlong Cai)
Abstract	An improved construction scheme of efficient extended irregular repeat-accumulate (eIRA) codes with easy check matrix encoding is proposed in this paper. At the dual diagonal parts of the right check matrices of the codes, the distances of the nodes are enlarged in their corresponding Tanner graphs by increasing the distances between the adjacent “1” of the matrices. Thus, the probabilities of small loops in the Tanner graphs of the codes are reduced. Therefore, it decreases the error self-feedback and obtains good decoding performance. Moreover, with an extrinsic information transfer (EXIT) chart method, the degree profile of the code can be optimally designed to meet the requirement of optimal decoding performance. Simulation results show that our proposed coding scheme slightly outperforms the contrast original eIRA code about 0.05–0.1 dB at a bit-error-ratio (BER) of $10^{−5}$ with the same binary phase shift keying (BPSK) system in an additive white Gaussian noise (AWGN) channel. In addition, it obtains lower encoding and decoding complexity since it employs the sparse check matrices for encoding and applies the easy addressing operations both for encoding and decoding. Therefore, the proposed scheme of constructing eIRA codes can be efficiently applied in wireless digital communications.
Starting Page	2778
Ending Page	2782
File Size	298345
Page Count	5
File Format	PDF
ISBN	9781467359382
ISSN	15253511
e-ISBN	9781467359399
e-ISBN	9781467359375
DOI	10.1109/WCNC.2013.6555000
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-04-07
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parity check codes Complexity theory Channel coding Decoding Sparse matrices Generators
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Efficient code construction of (3, k) Regular LDPC codes

Compression of binary sources with side information using low-density parity-check codes

Hybrid Construction of Long LDPC Codes with Very Low Density

Structured eIRA codes with low floors

Hardware Aware eIRA LDPC Code Generation

Non-binary low-density parity-check codes for the q-ary erasure channel

Structured eIRA codes

Low density parity check matrices for coding of multiple access networks

Construction analysis of low-density parity-check codes for free-space optical communication

Construction of EIRA codes with enlarged dual diagonal distance by EXIT charts

Similar Documents

Efficient code construction of (3, k) Regular LDPC codes

Compression of binary sources with side information using low-density parity-check codes

Hybrid Construction of Long LDPC Codes with Very Low Density

Structured eIRA codes with low floors

Hardware Aware eIRA LDPC Code Generation

Non-binary low-density parity-check codes for the q-ary erasure channel

Structured eIRA codes

Low density parity check matrices for coding of multiple access networks

Construction analysis of low-density parity-check codes for free-space optical communication

Construction of EIRA codes with enlarged dual diagonal distance by EXIT charts