NDLI: Progress in WSI SRAM development

Content Provider	IEEE Xplore Digital Library
Author	Bourassa, R. Coffman, T. Brewer, J.E.
Copyright Year	1990
Description	Author affiliation: Inova Microelectron., Colorado Springs, CO, USA (Bourassa, R.; Coffman, T.)
Abstract	Inova has developed a one megabit monolithic static RAM which contains over five million transistors and occupies a die area of approximately 320 square mm. This product has been in production since March, 1988, is fully 883C compliant, is the largest monolithic production memory in the world today, and has demonstrated wafer yields as high as 100%. The product exists in both 8 and 16 organizations, and is fabricated on a 1.2 mu P-well CMOS process. Current delivery rates are tens of thousands of devices per month. This paper reviews Inroute technology, the present state of the existing product, the Inroute yield model, current yield information on the Inova 1 M SRAM and an experimental monolithic eight megabit SRAM being developed jointly by INOVA and Westinghouse to explore the yield and packaging aspects of large area devices for use in military systems. The design combines the INOVA commercial one megabit SRAM, and the Westinghouse volumetrically efficient dual composite packaging approach.
Starting Page	13
Ending Page	19
File Size	413677
Page Count	7
File Format	PDF
ISBN	0818690135
DOI	10.1109/ICWSI.1990.63877
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-01-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Packaging Fuses Production Springs Testing Microelectronics Read-write memory CMOS process CMOS technology
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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