NDLI: Hot topic session 9C: Test and fault tolerance for emerging memory technologies

Content Provider	IEEE Xplore Digital Library
Author	Natarajan, Suriya Majumdar, Amitava Rajendran, Jeyavijayan
Copyright Year	2014
Description	Author affiliation: Intel (Natarajan, Suriya) \|\| Polytechnic Institute of NYU (Rajendran, Jeyavijayan) \|\| Xilinx (Majumdar, Amitava)
Abstract	Ever larger on-die memory arrays for future processors in CMOS logic technology drive the need for dense and scalable embedded memory alternatives beyond SRAM and eDRAM. Recent advances in nonvolatile spin transfer torque (STT) RAM technology, which stores data by the spin orientation of a soft ferromagnetic material and shows current induced switching, have created interest for its use as embedded memory. STTRAM exhibits scalable write current, sufficient read margin and nonvolatility or persistence, all of which make it an attractive solution for last level cache, embedded cache or even main memory. In an era of on-die non-volatile storage, new defect, disturb and fault mechanisms need to be comprehended during characterization as well as manufacturing tests. The first part of the talk will introduce STTRAM and review the fundamentals of the cell design, the read and write mechanisms as well as recent advances in technology, which make it a potential successor to eDRAM, followed by how variations and thermal noise limit the material and cell design space. The second part will discuss new test models that would be required for such non-volatile storage, the necessity of large scale data collection and analysis, as well as the need for BIST and on-line testing, and conclude with challenges and opportunities in STTRAM testing that lie ahead of us.
Starting Page	1
Ending Page	1
File Size	117199
Page Count	1
File Format	PDF
ISBN	9781479926114
DOI	10.1109/VTS.2014.6818788
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-04-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Abstracts Through-silicon vias Nonvolatile memory Torque Testing Reliability
Content Type	Text
Resource Type	Article

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