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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Daewoong Kang Sungbok Lee Hyun-Mog Park Dong-jun Lee Jun Kim Junho Seo Chikyoung Lee Cheol Song Chang-Sub Lee Hyungcheol Shin Jaihyuk Song Haebum Lee Jeong-Hyuk Choi Young-Hyun Jun |
| Copyright Year | 2011 |
| Description | Author affiliation: Flash Process Architecture Team, Flash Development Center, Samsung Electronics Co., San #24, Nongseo-Dong, Giheung-Ku, Yongin-City, Gyenggi-Do, 449-711, South Korea (Daewoong Kang; Sungbok Lee; Hyun-Mog Park; Dong-jun Lee; Jun Kim; Junho Seo; Chikyoung Lee; Cheol Song; Chang-Sub Lee; Jaihyuk Song; Haebum Lee; Jeong-Hyuk Choi; Young-Hyun Jun) || Seoul National Univ. Dept. of EE, Seoul, #059 Kwanak P.O. Box 34 151-600, South Korea (Hyungcheol Shin) |
| Abstract | We measured RTN characteristics in NAND flash cell array and test structure having 27 nm design rule depending on different program and erase states. From these measured results, we analyzed the trap properties along the active width direction from of NAND flash cell. Using special analysis methods, we verified the validity of this characterization tool and applied it to various processed NAND flash memory cells. |
| Starting Page | 206 |
| Ending Page | 207 |
| File Size | 904544 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781424499496 |
| ISSN | 21589682 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-06-14 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | JSAP (Japan Society of Applied Physi |
| Subject Keyword | Fluctuations Threshold voltage Flash memory Etching Very large scale integration Electric fields Time measurement |
| Content Type | Text |
| Resource Type | Article |
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