NDLI: Genetic algorithm based approach for integrated state assignment and flipflop selection in finite state machine synthesis

Content Provider	IEEE Xplore Digital Library
Author	Chattopadhyay, S. Chaudhuri, P.P.
Copyright Year	1997
Description	Author affiliation: Dept. of Comput. Sci. & Technol., Bengal Eng. Coll., Howrah, India (Chattopadhyay, S.)
Abstract	Current renewed emphasis for more aggressive logic designs with lesser area, delay, and power, demands exploration of alternative avenues that would lead to better designs, may be at the higher cost of computation. This paper explores the avenue of the Genetic Algorithm (GA) for a holistic view for synthesis of Finite State Machine (FSM). Two aspects-state assignment and choice of sequential elements-significantly affect the cost of the combinational logic synthesized for a FSM. While the state assignment strategies reported in the literature target a specific type of sequential element (generally, a D flip-flop), this paper chooses a combination of available flip-flops to yield the best result. Thus the problems of state assignment and flip-flop selection have been integrated into a single genetic algorithmic formulation. Exhaustive experimentation done on a large suite of benchmarks have established the fact that on the average this tool outperforms the two level state assignment algorithm NOVA by more than 300%. The quality of the solution obtained and the high rate of convergence has established the effectiveness of the GA in solving this particular NP-complete problem. Further, the inherent parallelism of GA makes the proposed scheme ideal for solving the problem in a multiprocessor environment.
Starting Page	522
Ending Page	527
File Size	591256
Page Count	6
File Format	PDF
ISBN	0818682248
ISSN	10639667
DOI	10.1109/ICVD.1998.646659
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-01-04
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Genetic algorithms Programmable logic arrays Automata Delay Flip-flops Circuit synthesis Logic design Costs Encoding Educational institutions
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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