NDLI: A low-noise 2-GB/s 256-Mb packet-based DRAM with a robust array power supply

Content Provider	IEEE Xplore Digital Library
Author	Kee-Won Kwon Byung-Sick Moon Changhyun Kim Soo-In Cho
Copyright Year	2002
Description	Author affiliation: DRAM Design III, Samsung Electron. Co. LTD., Gyunggi, South Korea (Kee-Won Kwon; Byung-Sick Moon; Changhyun Kim; Soo-In Cho)
Abstract	With a robust array power supply, the array noise is remarkably suppressed in 256-Mb packet-based DRAM. The array power supply is equipped with direct driver discharge, Vgs clamp, high-VCC compensator, and low-VCC Vgs booster. The VCCA drop and overshoot are improved from 133 mV to 70 mV and from 260 mV to 120 mV, respectively, as all these features are included. The tranquil VCCA results in active restoration improvement by 3.0 ns in the full chip performance. The suppression of the VCCA overshoot makes high speed operation reliable owing to rapid column precharge. The power consumption by the VCCA generator is also reduced by 35% because of the time-variant DC current control.
Starting Page	116
Ending Page	117
File Size	202871
Page Count	2
File Format	PDF
ISBN	0780373103
DOI	10.1109/VLSIC.2002.1015060
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-06-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Robustness Power supplies Power generation Power grids Standby generators Driver circuits Energy consumption Distributed power generation Mesh generation
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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