NDLI: A 6.5 GHz CMOS FSK modulator for wireless sensor applications

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A 6.5 GHz CMOS FSK modulator for wireless sensor applications

Content Provider	IEEE Xplore Digital Library
Author	SeongHwan Cho Chandrakasan, A.P.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA (SeongHwan Cho; Chandrakasan, A.P.)
Abstract	A 6.5 GHz FSK modulator suitable for low power wireless sensor network is presented. The modulator employs closed loop direct VCO modulation to achieve high data rate, variable loop bandwidth technique for fast start-up rates and /spl Sigma/-/spl Delta/ for reduced power consumption in the divider with fine resolution in channel selection. The synthesizer, implemented in 0.25 /spl mu/m CMOS, achieves 20 /spl mu/s start-up time with an effective data rate of 2.5 Mbps while consuming 22 mW.
Starting Page	182
Ending Page	185
File Size	299481
Page Count	4
File Format	PDF
ISBN	0780373103
DOI	10.1109/VLSIC.2002.1015079
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-06-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Frequency shift keying Wireless sensor networks Phase locked loops Voltage-controlled oscillators Bandwidth Phase modulation Pulse modulation Energy consumption Continuous phase modulation Synthesizers
Content Type	Text
Resource Type	Article

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