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Content Provider | IEEE Xplore Digital Library |
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Author | Zhenkai Zhang Koutsoukos, X. |
Copyright Year | 2015 |
Description | Author affiliation: Inst. for Software Integrated Syst., Vanderbilt Univ., Nashville, TN, USA (Zhenkai Zhang; Koutsoukos, X.) |
Abstract | Multi-level inclusive caches are often used in multi-core processors to simplify the design of cache coherence protocol. However, the use of such cache hierarchies poses great challenges to tight worst-case execution time (WCET) estimation due to the possible invalidation behavior. Traditionally, multi-level inclusive caches are analyzed in a level-by-level manner, and at each level three analyses (i.e. must, may, and persistence) are performed separately. At a particular level, conservative decisions need to be made when the behaviors of other levels are not available, which hurts analysis precision. In this paper, we propose an approach which analyzes a multi-level inclusive cache by integrating the three analyses for all levels together. The approach is based on the abstract interpretation of a concrete operational semantics defined for multi-level inclusive caches. We evaluate the proposed approach and also compare it with two state-of-the-art approaches. From the experimental results, we can observe the proposed approach can significantly improve the analysis precision under relatively small cache size configurations. |
Starting Page | 350 |
Ending Page | 360 |
File Size | 306857 |
Page Count | 11 |
File Format | |
ISBN | 9781467395076 |
ISSN | 10528725 |
DOI | 10.1109/RTSS.2015.40 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2015-12-01 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Estimation Multicore processing Real-time systems Program processors Concrete Semantics Coherence |
Content Type | Text |
Resource Type | Article |
Subject | Computer Networks and Communications Hardware and Architecture Software |
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