NDLI: Design and Test of Novel Programmable Digital Three Phases SPWM Chip

Content Provider	IEEE Xplore Digital Library
Author	Yang Yuan Gao Yong Chen Lijie
Copyright Year	2006
Description	Author affiliation: Dept. of Electron. Eng., Xi'an Univ. of Technol. (Yang Yuan; Gao Yong; Chen Lijie)
Abstract	In order to improve the sinusoidal pulse width modulation (SPWM) control system's real time capability and reduce the system's complexity, a high precision programmable digital three phases SPWM chip based on variable sampling frequency method is designed. The chip can be "programmed" by MCU to set the needed parameters with great flexibility and can be interfaced with multiplexed and non-multiplexed data bus mode. To implement the high precision for any frequency sinusoidal power wave, an improved method is presented by changing the sampling clock frequency for different power frequency while keeping the sampling points constant. In addition, the pipeline structure also has improved the speed of the system. The chip is fabricated with 0.35 mum CMOS technology and the core area is 1755times1746 $mum^{2}.$ The test results show that the chip has reached its specifications. The control resolution for any power frequency is up to 16 bits, the system clock can reach 50 MHz, and the ROM operation period is up to 1.68 mus
Sponsorship	China Electrotechnical Soc. IEEE Power Electron. Soc
Starting Page	1
Ending Page	3
File Size	329546
Page Count	3
File Format	PDF
ISBN	1424404487
DOI	10.1109/IPEMC.2006.4778268
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-08-14
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Frequency Sampling methods Pulse width modulation Control systems Clocks CMOS technology Space vector pulse width modulation Phase modulation Digital modulation test SPWM chip design
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A novel direct digital SPWM method for multilevel voltage source inverters

Phase-accumulator based multi-channel high-precision digital PWM architecture

A novel high frequency universal space vector modulation control technique [for invertors]

FPGA based digital implementation of naturally sampled space vector modulation

Modified SPWM control schemes for three-phase inverters

A Bit-Stream based space vector modulator

A three-phase predictive PWM AC/DC converter with phase compensation and space vector control

Sinusoidal Pulse Width Modulation (SPWM) Design and Implementation by Focusing on Reducing Harmonic Content

On the design of nonlinear pulse-width-modulation controllers

Design and Test of Novel Programmable Digital Three Phases SPWM Chip

Similar Documents

A novel direct digital SPWM method for multilevel voltage source inverters

Phase-accumulator based multi-channel high-precision digital PWM architecture

A novel high frequency universal space vector modulation control technique [for invertors]

FPGA based digital implementation of naturally sampled space vector modulation

Modified SPWM control schemes for three-phase inverters

A Bit-Stream based space vector modulator

A three-phase predictive PWM AC/DC converter with phase compensation and space vector control

Sinusoidal Pulse Width Modulation (SPWM) Design and Implementation by Focusing on Reducing Harmonic Content

On the design of nonlinear pulse-width-modulation controllers

Design and Test of Novel Programmable Digital Three Phases SPWM Chip