NDLI: A 4-antenna transmitter in 0.18µm CMOS using space-time block codes

Content Provider	IEEE Xplore Digital Library
Author	Neihart, N.M. Kuang-Wei Cheng Walling, J.S. Sangmin Yoo Allstot, D.J.
Copyright Year	2009
Description	Author affiliation: Iowa State University, Ames, 50011, USA (Neihart, N.M.) \|\| University of Washington, Seattle, 98195, USA (Kuang-Wei Cheng; Walling, J.S.; Sangmin Yoo; Allstot, D.J.)
Abstract	Efficient power delivery is a challenge in many RF systems. The use of space-time block codes as a means for reducing the required output power of the power amplifier and thereby improving the system efficiency is described. The first implementation of a fully-integrated 4-antenna transmitter based on space-time block codes is described. It is fully configurable as a 1-, 2-, 3-, and 4-antenna system to investigate the tradeoffs between space-time block code length and overall system efficiency. It is shown that the measured optimum is a 3-antenna system capable of delivering +27.7 dBm into a 50 Ω load using three class-AB power amplifier cells each delivering +20 dBm into 50 Ω with a PAE of 23%. Owing to the space-time block coding gain, the overall PAE of the 3-channel transmitter delivering +27.7 dBm is 39%. The system is intenerated in 0.18µm CMOS and measures 4mm × 6mm.
Starting Page	361
Ending Page	364
File Size	3317848
Page Count	4
File Format	PDF
ISBN	9781424433773
ISSN	15292517
DOI	10.1109/RFIC.2009.5135558
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-06-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transmitters Block codes MIMO Power generation Power amplifiers Receiving antennas Transmitting antennas Voltage Costs CMOS process
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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