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Content Provider | IEEE Xplore Digital Library |
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Author | Yu-Kang Lo Jian-Min Wang Sen-Tong Wu |
Copyright Year | 2005 |
Description | Author affiliation: Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei (Yu-Kang Lo; Jian-Min Wang; Sen-Tong Wu) |
Abstract | A new commutation method for a full-bridge current-source inverter is presented in this paper. During the commutation time, the four active switches are not simultaneously conducting. Instead, the two legs of the full-bridge inverter are in turn triggered on to provide the conducting paths for the load current. The steady-state load current can be reduced to zero during the commutation time. The residue energy stored in the parasitic inductance of the load is dissipated. And thus the voltage spikes resulted when the load current changes its polarity are reduced. The operations of the full-bridge current-source inverter are discussed. A prototype composed of IGBT power switches is implemented to output an ac current of which the amplitude is up to plusmn125 A. Experimental results show that the step change of the load current during the commutation is indeed reduced |
Starting Page | 224 |
Ending Page | 227 |
File Size | 1295859 |
Page Count | 4 |
File Format | |
ISBN | 0780392965 |
DOI | 10.1109/PEDS.2005.1619689 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2005-11-28 |
Publisher Place | Malaysia |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Inverters Switches Steady-state Inductance Bridge circuits Voltage Snubbers Leg Prototypes Insulated gate bipolar transistors current-source component full-bridge |
Content Type | Text |
Resource Type | Article |
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