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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Nguyen Van Nho |
| Copyright Year | 2005 |
| Description | Author affiliation: Dept. of Electr. Eng., Hochiminh City Univ. of Technol. (Nguyen Van Nho) |
| Abstract | This paper presents a simple graphical approach to compare the switching losses of various carrier SVPWM methods for multilevel inverters. Similarly, the harmonic distortion factors can be indirectly validated. There have been deduced SVPWM methods related to maximum, medium and minimum zero sequence functions. As a result of comparison, the SVPWM with optimized switching loss and THD factor has been proposed. The investigation shows that the maximum/minimum offset SVPWM would be superior to others for lower modulation index and the medium/minimum common mode SVPWM can obtain advantages in the medium and high modulation index range. The proposed SVPWM methods have been mathematical formulated and demonstrated by simulation results |
| Starting Page | 192 |
| Ending Page | 197 |
| File Size | 2809793 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780392965 |
| DOI | 10.1109/PEDS.2005.1619684 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-11-28 |
| Publisher Place | Malaysia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Switching loss Harmonic distortion Space vector pulse width modulation Pulse width modulation inverters Paper technology Topology Harmonic analysis Design optimization Voltage Performance analysis multilevel inverters Harmonics distortions switching loss |
| Content Type | Text |
| Resource Type | Article |
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