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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yen-Shin Lai Chia-An Yeh Ko-Yen Lee |
| Copyright Year | 2007 |
| Description | Author affiliation: Nat. Taipei Univ. of Technol., Taipei (Yen-Shin Lai; Chia-An Yeh; Ko-Yen Lee) |
| Abstract | This paper present a novel self-commissioning digital power converter control technique which will significantly reduce the sampling frequency of A/D converter while not resulting in performance deterioration. The technique includes self-commission of controller and control of power converter. In the self-commissioning process, the circuit parameter is identified before start up and then the controller parameters of digital control are calculated automatically according to the identification results and assigned design specifications. Peak current mode is realized based upon the estimated current using low sampling frequency A/D converter to significantly reducing the cost. Experimental results of an FPGA-based digital power converter are presented. The results show that the voltage ripple is within 3% under both steady and transient conditions. |
| Starting Page | 1644 |
| Ending Page | 1650 |
| File Size | 11025273 |
| Page Count | 7 |
| File Format | |
| ISBN | 1424408431 |
| DOI | 10.1109/PCCON.2007.373185 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-04-02 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Digital-to-frequency converters Digital control Sampling methods Frequency conversion Voltage control Automatic control Frequency estimation Circuits Costs Paper technology current mode control Digital power |
| Content Type | Text |
| Resource Type | Article |
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