NDLI: Reliable Complementary HIGFET Technology for High Speed/Low Power Applications

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Proceedings of the 26th European Solid State Device Research Conference

Venues 1971-1997

Scientific Programme Committees

Technical Contents

Challenges of Innovation in Microelectronics and Cooperation of Industrial and Nonindustrial R&D

Micro- and Opto-Electronics Technologies towards Multimedia Era

Passivation of Ag on SiO by Annealing Ag-Ti Alloys in an Ammonia Ambient

Future Development in Electronic Systems is Impacted Both by Semiconductor Technology and IC Assembly Techniques

Recent advances and future trends of ULSI technologies

Quantum Cascade Lasers: New Light Sources for the Mid-to-Far-Infrared

Hot-Carrier Reliability of $S^{4}D$ n-MOSFETs

Effect of Nitride Sidewall Spacer on Hot Carrier Reliability Characteristics of MOSFET's

A New Charge Pumping Method for Studying the Si-SiO Interface

The Influence of Impurity Scattering in Highly Doped SOI-MOSFETs

Influence of the Silicon Thickness on the Reverse Short Channel Effect in SOI MOSFETs

Impact of Latch Phenomenon on Low Frequency Noise in SOI MOSFETs

Advanced Ti Salicide Process for Sub-0.2 μm CMOS

Interconnects Integration for 0.25μm CMOS Technology

Low Dielectric Constant Spin-on-Polymers for Interlayer Dielectric Applications

Passive Microwave Antennas based on Silicon Surface Oriented P-I-N Structure and Ferroelectric Ceramics

Sensitivity and Noise of MOS Magnetic Field Effect Transistors

Review Paper - RADFETs for Improved Radiation Sensitivity

Non Volatile Memories: Issues, Challenges and Trends for the 2000's Scenario

Subthreshold Source-Side Injection $(S^{3}I):$ A Promising Programming Mechanism for Scaled-Down, Low-Power Flash Memories

Non-Volatile EEPROM Cells for Analog Circuit Calibration

Comparison Of The Suitability Of Various Programming Mechanisms Used For Multilevel Non-Volatile Information Storage

Physical Models for 2D Numerical Simulation of New Titanium Salicide Processes

Influence of the Silicon Nitride Oxidation on the Performances of NCLAD Isolation

Diffusion of Boron in Polycrystalline Silicon

A Transient Activation Model for Phosphorus After Sub-Amorphizing Channeling Implants

Optimization of Poly-Emitter Technologies in a BiCMOS Environment using Advanced Physical Modeling

Domain Decomposition Method Applied to 3D Finite Element Process Simulation

Electrical and Morphological Characterization of Sub-Micron Silicon Devices

Shallow Trench Isolation for Sub 1/4 Micron CMOS Technologies

Shallow Trench Isolation for High Density Flash Memories

The Stress-Induced Voids Formation in the Polysilicon Film During Poly-Buffered Local Oxidation of Silicon: Characterisation and Model

Poly Encapsulated LOCOS Lateral Isolation for 0.25 μm CMOS

Analysis of Micropump Operation Using HDL-A Macromodels

A Complete Simulation System for Active Matrix Flat Panel Displays

Dynamic Behavior of a-Si Devices for Flat-Panel Displays

Light-Addressable Potentiometric Sensors - Model and Experiments

Micromechanical Gas Heat Capacity Sensor

Investigation of Hole and Electron Back Injected Tunneling Currents in a Poly-Silicon Emitter Complementary Bipolar Technology

$Ge^{+}$ Dose Dependence of Electrical Characteristics in Germanium Ion-implanted Polycrystalline Silicon Films

Low Temperature Polycrystalline Silicon Thin Film Transistors Having Titanium Disilicide Source and Drain Contacts

Hot Carrier Reliability Characteristics of Ultra Short Channel CMOSFET's

Determination of the Generation Lifetime in Si/SiGe/Si Epitaxial Layer Stacks Grown by MBE and LPCVD using Non Equilibrium Simultaneous HF/LF MOS CV Measurements

Inversion Layer Injection Devices - A New Class of Semiconductor Devices

MIS Àuger Transistor

3D Analysis of a Shallow Trench Isolated 0.25/0.25μm NMOS Transistor

Characterization and Matching Analysis of 50 nm-NMOS-Transistors

Optimization of Hetero-FET Alloy Composition for Low Noise Applications in Millimeter-Wave Frequency Range

Modelling of Gate Currents in MOSFETs Operating at Low Drain Voltages

Simulation and Experimental Results of Al Doping by Ion Beam Mixing Technique for Deep Low Doped Junction Formation

An Analytical Model for Hot-Carrier-Induced Degradation of Submicron N-MOSFET

Refined Analytical Model of Combined Thermionic Emission and Drift-Diffusion Current Flow through Schottky Structure

Investigation of thermally generated leakage currents in silicon pn-junctions by means of 2D-Device Simulations

Improved Description of GAA (Gate-All-Around) MOSFET I-V Characteristics

An Efficient Numerical Approach to the Physics-Based Sensitivity Analysis of Bipolar Semiconductor Devices

2-D Modelling and Optimisation of Trench Insulated Gate Bipolar Transistors (TIGBT)

Hydrodynamic Modeling of Transport and Noise Spectra in $n^{+}nn^{+}$ Semiconductor Structures

Modelling of Insulated Gate Bipolar Transistors with Buffer-Layers

Electrical Modelling of Silicide Ohmic Contacts for MOS Devices

All-Silicon Phase-Amplitude Integrated Optical Modulator based on a BMFET Structure

The Observation of Gate Length Dependence of GIDL in n-MOSFET's

EXTIGATE: The Ultimate Process Architecture for sub-0.25μm CMOS Technologies

Channel Engineering using RP-CVD Epitaxy for High Performance CMOS Transistors

Comparative Study of Surface and Buried Channel 0.25 μm pMOSFETs

Design and Characterisation of High-Performance 0.13 μm NMOS Devices

Multi-Dimensional Process Simulation Software Integration in Prompt

Level Set Methods for Surface Advancement in Lithography, Etching and Deposition

Rigorous Three-Dimensional Photolithography Simulation over Nonplanar Structures

3-D Adaptive Simulation of Thermal Oxidation Process

Plasma Doped (PLAD) Deep Sub-Half Micron Buried Channel PMOSFETS and its Application to Next Generation ULSI Circuits

Study of DC Stress Induced Leakage Current (SILC) and its Dependence on Oxide Nitridation

Enhanced Hole Trapping in MOS Devices Damaged by Plasma-Induced Charging

Optimization of Nitridation Conditions for High Quality Inter-Polysilicon Dielectric Layers

A Plasma NH Process to Improve the Reliability of 0.35μm $P^{+}$ Poly-Gate Nitrided Oxide P-MOSFET's

A Novel High-Sensitivity Photodetector with SOI MOS Structure

A 4.2 K CMOS-Compatible Wide-Spectrum Detector

A new measurement method of interface-state parameters, based on dark current characterization in CCDs

Combined Opto-Electronical Simulation of Metal-Semiconductor-Metal (MSM) Photodetectors

Study and Optimization of Bipolar Power Transistors using Mixed-Mode Simulations

Gettering Mechanisms and Optimized Lifetime Control in Pt-Doped Silicon Power Devices

A Highly Efficient 1.9-GHz Si High Power MOSFET

Electron Velocity Overshoot in Strained Si/Si MOSFETs

Leakage Current in Polysilicon TFTs: Experiments and Interpretation

Anomalous Low-Frequency C-V Behaviour in Polysilicon TFTs

A 30 GHz f Quasi Self-Aligned Single Poly Emitter Bipolar Technology

A 0.2 μm Emitter Bipolar Technology for Low Cost and High Performance Mixed Analog/Digital Applications

Performance Improvement in a 200 mm BiCMOS Technology by Si/SiGe Heterojuncton Bipolar Transistor Integration

Bias Stress Stability of C-doped AlGaAs/GaAs HBTs

Low-Frequency Noise in GaP/GaAs Heterojunction Bipolar Transistors

Measurement of the Electron Ionization Coefficient Temperature Dependence in InGaAs-based Heterojunction Bipolar Transistors

A Si-Ge HBT Technology for the Wireless Marketplace

Increased Current Gain and Reduced Emitter Resistance in Sige HBTs by Fluorine Or Chlorine Implantation into a Polysilicon Emitter Contact

Fabrication and Electrical Characterization of SI/SIGE P-Channel MOSFETs with a Delta Doped Boron Layer

High-Frequency SiGe HBT's with Implanted Emitters

Experiments with 0.18 μm SiGe Channel PMOSFETs and $P^{+}$ Poly-SiGe Gate

Two-Dimensional Analytical Modelling of Subthreshold Region in Fully-Depleted SOI MOSFETs

A New Non-Quasi-Static SOI MOSFET Model Dedicated to Analog Circuit Simulation

Mixed-Mode Circuit Simulation with Full-Wave Analysis of Interconnections

Analysis of S/D Engineering through Short Channel Effect and Hot Carrier Injection behavior in a 0.35μm CMOS Technology

A Charge based MOSFET Model for Low-Voltage Mixed-Signal Applications

Measurement of Standard Deviation for Threshold Voltage using Parallel-Connected MOSFETs

Advanced Architectures for 0.18-0.12μm CMOS Generations

Halo Doping for Good Performance and Reliability in 0.25 μm CMOS Technology

A Process for Strained Silicon n-Channel HMOSFETs

One junction approach to make deep submicron PMOSFETs for low power applications

Hybrid 90 GHz rectenna chip with CMOS preamplifier

A New Technological Process to Realize InGaAsP/InP Semi-Insulating Buried Heterostructure Lasers Emitting at 1.55 μm

A New Concept for a Direct Optical Free-Space Interconnect without Lenses

Single-Beam and Single-Mode Emission from Surface Emitting Laser Diodes based on Surface Mode Emission

Superimposed Bragg Gratings on Semiconductor Material

Theoretical Analysis of Microwave-Generation in Semiconductor Multiple Quantum Well Structures

A Novel GaAs Structure for Terahertz Generators

2D Simulation of Velocity Overshoot in GaAs HBT

Experimental Study of Deep Levels in MESFETs

High Speed PIN Photodiodes for 10 - 20 Gbit/s High Sensitivity Photoreceivers

High Speed Three-Terminal Laser Modulation using Electron Extraction via Resonant-Tunneling Structure

Laser-Induced Gratings and Hot-Carrier Dynamics in III-V Semiconductors

EBIC Analysis of SiC Mesa Diodes

Optimization and Comparison of Losses in Si and 4H SiC 1kV Trench MOSFETs

Strain Relaxation Due to Phosphorus Implantation into Strained Si/SiGe/Si Heterostructure

A High Performance Single Poly 0.μm BiCMOS Technology Optimized for Mixed Signal Applications

High Performance 0.3 μm CMOS Technology using I-Line Lithography

Realisation of a 0.25 μm NMOSFET using Ge (x≪0.4) as Gate Material

Elevated Base Single - Poly Self - Aligned BJTs for Deep Submicron BiCMOS

Mechanical Stress in and Surrounding CoSi and TiSi Lines

A Triple-well Architecture for Low-voltage Operation in Submicron CMOS Devices

Effects of Fluorine Incorporation on the Characteristics of a Single Poly EEPROM Cell

Characterisation of Advanced LOCOS Isolation

Plasma Assisted Chemical Vapor Deposition of Aluminum Thin Films for ULSI Metallization

Platinum Etching in an Inductively Coupled Plasma

On-Wafer Calibration of Sol-Gel Derived Bulk Acoustic Wave Devices

A Dynamic Model for Multiterminal Bipolar Devices Used in Smart-Power Applications

Analysis of Leakage Currents in Smart Power Devices

A Stored Charge Model for Integrated Injection Logic $(I^{2}L)$ Structures using Si/SiGe Material

A New Method for Calculating the Propagation Delay in CML Bipolar Switching

Characterization of Minority Carrier Concentration in the Base of npn SiGe HBT

On the Use of a Genetic Algorithm for Millimeter-Wave FET Modeling

Influence of Mobility Degradation on Distortion Analysis in MOSFETs

Interconnect Geometric Parameters Optimization

New Method for the Extraction of the Gate Voltage Dependence of the Series Resistance in CMOS Transistors

Closed-Form Frequency Dependent Gate-to-Channel Capacitance Model for Submicron MOSFET's

An experimental high performance 16M DRAM using giga-bit technologies

Characterization of Sputtered High Dielectric Constant Ba Thin Films for DRAM Applications

Double-Poly EEPROM Cell for High Density Memories using Positive and Negative Voltage Programming

A Salicided Flash EEPROM for Embedded Memory Applications

Static C-V Characteristics of Fully Depleted NMOS Devices on SOI

Microtransducer CAD

Micromachined flow sensors using a piezoresistive cantilever paddle

A Smart Resonant Sensor Fabricated by Si MST for Online Vibration Control of Rotating Machinery

Pendulum Type Accelerometers based on Thick Polysilicon Surface Micromachining

MOSFET Matching in a Deep Submicron Technology

Characterization and Modeling of Integrated Photosensors in Standard CMOS Technology

Materials and Devices for Si-Based Optoelectronics

Influence of Real-Space Transfer on Transit Time and Noise in HEMTs

Facet heating in high power GaAlAs/GaAs edge emitting laser diodes

Experimental Method to Extract A.C. Collector-Base Resistance from SiGe HBT's

Random Telegraph Signal in the Quasi-Breakdown Current of MOS Capacitors

On the Polarity Dependence of Oxide Breakdown in MOS-Devices with N+ and P+ Polysilicon Gate

Electric Field Dependence of Charge Build-up Mechanisms and Breakdown Phenomena in Thin Oxides During Fowler-Nordheim Injection

Novel MSM-2DEG PD/HEMT Photoreceiver for 10Gbit/s Operation

Use of Gain Non-Linearities in Two-Terminal Edge-Coupled InGaAs/InP Heterojunction Phototransistors

Low Temperature Dependence of the Device Parameters of Separate Absorption, Grading, Charge and Multiplication InP/InGaAs Avalanche Photodiodes

On 1/F Noise in Polysilicon Emitter Bipolar Transistors: Coherence between Base Current Noise and Emitter Series Resistance Noise

Localized Lifetime Control in Bipolar Silicon Devices

Application of silane-only selective epitaxy to the fabrication of fully self-aligned silicon bipolar transistors

Large - Angle - Tilt - Implanted - Base (LATIB) for Walled - Emitter Bipolar Transistors

Optimisation of a Link Base Implant for Reducing the Access Base Resistance of Single-Poly Quasi Self-Aligned Bipolar Transistors

Self-Aligned Metal/IDP Si Bipolar Technology with 12-ps ECL and 45-GHz Dynamic Frequency Divider

Monte Carlo Simulation of Electron Transport in Si: The First 20 Years

Efficient Full Band Monte Carlo Hot Carrier Simulation for Silicon Devices

Modeling Surface Scattering Effects in the Solution of the BTE based on Spherical Harmonics Expansion

Hot-Carrier Thermal Conductivity for Hydrodynamic Analyses

Impact of Fast Interface States on Effective Mobility of Heavily-Doped MOSFET's

Electromigration Failure in Thin Film Conductors a perspective

Time-Domain Characterization of Lattice Heating in Power VDMOSFETs by Means of an Interferometric Laserprobe Technique

Annealing of Stress-Induced Interface and Border Traps in MOS Devices: A Charge-Pumping Study

Kinetics of Hot-Carrier Degradation of Submicron n-Channel LDD MOSFET's

New Findings on Hot Carrier Effects in Bulk Silicon MOSFETs

High Performance 0.1-μm-Self-Aligned-Gate GaAs MESFET Technology

Reliable Complementary HIGFET Technology for High Speed/Low Power Applications

Current Transport in Double Heterojunction HEMTs

0.2μm T-gate InP/InGaAs/ InP pHEMT with an InGaP diffusion barrier layer grown by LP-MOCVD using an N-carrier

Microwave Performance of HFETs on Metamorphic InAs on GaAs Substrates

InAs/AlSb Dual-Gate HFETs with High Maximum Drain Bias

Integration of Porous Silicon Interference Filters in Si-Photodiodes

Array-Like Metal-Resistance-Semiconductor Photodetectors: Characterization and Modelling

Analysis of VOC in Soils with a Tin Oxide Multisensor System

A Low Voltage Integrated Temperature Sensor

A Capacitive Chemical Sensor based on Porous Silicon

New 3D Polycrystalline Model of Electromigration Induced Voiding at Interconnect Vias

Improvements in the Electromigration Performance of an Aluminium-Copper Alloy Metallization by Optimization of the Copper Distribution

Electrical and Thermal Local Effects Simulation for Electromigration

The Correlation between ESD Robustness and Design Parameters in Submicron CMOS Technology

Electroluminescence Imaging for Defect Characterization in InP based Optoelectronic Devices

Recent Advances and Trends in SOI CMOS Technology

Selectively Grown Short Channel Vertical SI-P MOS Transistor for Future Three Dimensional Self-Aligned Integration

Analyses of Sub 1/4-Micron MOS-Transistors by Visible Light Emission

Photon emission in deep submicron SOI MOSFETs

A Straightforward Noise De-Embedding Method and its Application to High-Speed Silicon Bipolar Transistors

The 1/f Noise Behaviour of Interface Engineered Polysilicon Emitter Bipolar Transistors

2-D Modeling of Electronic Noise in Semiconductor Devices

Neural Networks for the Design and Reverse Engineering of BJTs

Analytical theory of gate-induced injection barrier modulation in compensated CMOS-compatible bipolar transistors

Hot-Carrier Degradation and Oxide Charge Build-up in Self-Aligned Etched-Polysilicon npn Bipolar Transistors

Effects of Non-Degenerately Doped Polysilicon on the Hot-Carrier Reliability of Tungsten Polycide Gate PMOSFETs

Hot-Carrier Reliability in n-MOSFET's Used as Pass-Transistors

Impact of Profiled LDD Structure on Hot Carrier Degradation of nMOSFET's

Optimization of the Reliability of 0.25 μm n-MOSFETs

Anomalous impact-ionization gate current in high breakdown InP-based HEMT's

Complementarity of Drain Current Transient Spectroscopy (DCTS) and G.R. Noise Analysis to Detect Traps in HEMTs

Hot Electron Degradation of the DC and Microwave Performance of InAlAs/InGaAs/InP HEMTs

Degradation of AlInAs HEMT Structures Induced by SiO Mask Layer Deposition

Impact of Gate Recess Offset on Pseudomorphic HEMT Performance: A Simulation Study

High-performance a-Si: H TFT for Large-Area AMLCDs

The Recent Trends in a-Si:H Thin-Film Transistors Technology

Excimer Laser Annealing Technology for Poly-Si Thin Film Transistors Fabrication

Investigation of a-Si:H Density of States by Photo Induced Discharge

Investigation on the Kink Effect in Poly-TFTs

A Low Temperature Process (⩽600°C) of Unhydrogenated In-Situ Doped Polysilicon Thin Film Transistors for Active-Matrix Applications

Influence of Tunnel Effects on C-V Curves in Amorphous Silicon Devices

Numerical Simulation of Transient Emission from Deep Level Traps in Polysilicon Thin Film Transistors

High Quality Polycrystalline Thin Films Transistors Made by Excimer Laser Crystallisation

Excimer-Laser Crystallization of Silicon-Germanium

Foreword to the Addendum

On-Board Processing in Chemical Microsystems

Simulation of the photocurrent behavior at laser excitation in metal/nanocrystalline Si-p-Si structures: novel IC compatible optical sensor

Sensitive Far-Infrared Photodetector based on PbTe(in)

Author Index of the Addendum

ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference

ESSDERC '94: 24th European Solid State Device Research Conference

ESSDERC '93: 23rd European solid State Device Research Conference

ESSDERC '92: 22nd European Solid State Device Research conference

ESSDERC '91: 21st European Solid State Device Research Conference

ESSDERC '90: 20th European Solid State Device Research Conference

ESSDERC '89: 19th European Solid State Device Research Conference

ESSDERC '88: 18th European Solid State Device Research Conference

ESSDERC '87: 17th European Solid State Device Research Conference

Reliable Complementary HIGFET Technology for High Speed/Low Power Applications

Content Provider	IEEE Xplore Digital Library
Author	Fawaz, Hussein Thiery, Jean-Francois Nluyen, Linh Delos, Elisabet Salmer, Georges
Copyright Year	1996
Description	Author affiliation: PICOGIGA, 5 Rue de la Réunion, Z. A. De Courtaboeuf, 91940 Les Ulis, FRANCE (Nluyen, Linh) \|\| Institut D'Electronique et de Microelectronique du Nord (IEMN), Avenue Poincaré, B.P. 69, 59652 Villeneuve d'Ascq, FRANCE (Fawaz, Hussein; Thiery, Jean-Francois; Delos, Elisabet; Salmer, Georges)
Abstract	A self aligned complementary HIGFET technology has been developed for high speed/low power digital applications. The process uses 9 lithographic steps including two level of interconnect metal. Typical transconductances of 290 mS/mm and 65 mS/mm are acheived on 1pm gate length N and P-channel devices respectively. These devices show promisefor incorporation in complementary digtal circuits.
Starting Page	869
Ending Page	872
File Size	1021566
Page Count	4
File Format	PDF
ISBN	286332196X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-09-09
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Editions Frontieres
Subject Keyword	Implants Gold Ohmic contacts Gallium arsenide Lithography Voltage Circuits Transistors Performance evaluation Current measurement
Content Type	Text
Resource Type	Article

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