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Content Provider | IEEE Xplore Digital Library |
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Author | Glories, P. Boudou, A. L'Ecuyer, Y. Leclaire, P. Chantraine, P. |
Copyright Year | 1985 |
Description | Author affiliation: BULL, Direction Recherche et Technologie Groupe, Circuits Intègrés, Av. Jean Jaurès, 78 340, Les Clayes sous Bols, France (Glories, P.; Boudou, A.; L'Ecuyer, Y.; Leclaire, P.; Chantraine, P.) |
Abstract | Low temperature MOS devices (77K) present significant gain in speed and density for a low technological cost. We report results concerning a three bits adder fabricated with an adapted cryogenic N-MOS process, using Argon-implanted polysilicon loads; the maximum measured frequency was 405 MHz for a 28 mW power consumption, with 2.4¿ design rules. |
Starting Page | 381 |
Ending Page | 384 |
File Size | 962106 |
Page Count | 4 |
File Format | |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1985-09-16 |
Publisher Place | France |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Cryogenics Temperature Transistors Circuits Adders MOS devices Energy consumption Gallium arsenide Logic devices Threshold voltage |
Content Type | Text |
Resource Type | Article |
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