NDLI: 1 GHz, 16 mW, 2 Bit Analogue to Digital GaAs Converter

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Table of contents

Limitations of Computing Devices

Design of a Standard Floating Point Chip

A Pipelined 330 MHz Multiplier

A Self Testing 2 Micron CMOS Chip Set for FFT Applications

A Flexible High Perfomance Serial Radix-2 FFT Butterfly Arithmetic Unit

A New Family of Modular Micro-Controllers with Peripherals on Board

A Monolithic Dual 16 Bit D/A Converter

New Methods Improving Static and Dynamic Performance of an 8-Bit/120-MHz A/D Converter

Offset and Charge Injection Compensation in an Incremental Analog to Digital Converter

High Speed 8-bit A/D Converter for Video Signal Processing

1 GHz, 16 mW, 2 Bit Analogue to Digital GaAs Converter

Table of contents

Integrated Cellular Array Performing Neighborhood Combinatorial Logic on Binary Pictures

A 2 Micron CMOS Two Dimensional Edge Detector for Real Time Image Processing

High Perfomance Multitask Processor For Real Time Applications

A Versatile High Speed Digital Signal Mixer

Digital Video Filters: Two Design Methodologies

A Compatible CMOS-JFET Pulse Density Modulator for Interpolative High-Resolution A/D Conversion

An Inherently Monotonic 7 Bit CMOS ADC for Video Applications

Wideband Voltage-Current Converter Circuit

A Dedicated Video-Signal Processing Analog/Digital CMOS LSI for Automated Visual Assembly and Inspection systems

An Analog / Digital Front - End CMOS IC for ISDN

Table of contents

Power Supply Constraints in Megabit DRAMs of the Future

A High Density Bipolar Static Memory Cell for 256K and Beyond

A 256K Pseudo Static RAM with High Speed Access Mode

A 60uA Standby Power 32k × 8 Pseudo-Static RAM

A High Speed 64K Bit CMOS RAM

A 256K CMOS EPROM

A Data-Transfer Architecture for Fast Multi-Bit Serial Access Mode DRAM

A 12ns/350mW 16Kb ECL Compatible RAM

A Formalism for Logical and Electrical Design

MOVE - A Useful Primitive for a Variety of I.C. C.A.D. Tools

The Chipgenerator Concept - A New Approach To Full Custom CMOS IC Design

Arianna: A Floor-Planning Tool

COMFOR: A Universal Extractor

An Interactive, Optimization based Tool for the Nominal Design of Integrated Circuits

An Accurate Biomedical Temperature Transducer with On-Chip Microcomputer Interfacing

ADULTS-L : A VLSI Layout Compactor

Method of PLA's Implementation : The Monoplane PLA

Table of contents

Trends in Microprocessors

Experimental 8K Bit High Performance Static Bipolar RAM

Novel High Performance Complementary CAM/RAM Circuits

A 5V-0nly 256K CMOS EEPROM using Barrier Height Lowering Technique

A Bell 212A and V22 Compatible Single Chip CMOS Modem

RTB: A Full-Duplex ECL Transceiver For Wideband Digital Systems

CAD Tools for Third Generation Custom VLSI Design

Cell Layout Library Parameterization

VENUS - A Fully Automatic Design System for Complex Cell and Gate Array Chips

Testability of a VLSI Systolic Array

Design Automation of Random Testable Circuits

MOSLAM : A switch level simulator based on an efficient analysis of conducting paths

Table of contents

Analog Integrated Filters or Continuous Time Filters for LSI and VLSI

An Interactive CAD System for Switched Capacitor Filters

A Four-Quadrant CMOS Analog Multiplier

A High Performance Integrated Circuit for Successive Detection Logarithmic Amplifiers

VLSI Architecture of a FIR Adaptive Filter

A Design and Packaging Technique for a High-Gain, GHz-Band Single-Chip Amplifier

A Fast Low-Noise Amplifier Cable Driver Combination

A Fast Settling FET Input Monolithic Instrumentation Amplifier

Physics and Applications of BIMOS Technology

Bus Controlled Power Driver Circuit

High Reliability Bipolar Integrated Circuits for 565Mbit/s Optical Transmission Systems

Third Generation CCD Linear Sensor

A 680 Mb/s Error Monitor for Fibre Optic Links

A Class of MOS Voltage Controlled Negative Differential Resistance Circuits for VLSI Adaptive Systems

CASBA : Cryptographic Applications using Signed Binary Arithmetic

A High-Speed Adder in Cryogenic N-MOS

Low-Power GaAs ICs

Table of contents

Integrated Circuits Spur Digital Telecommunication

An Experimental CMOS TV Synchronization IC

A Monolithic 5 GHz Frequency Divider IC Fabricated with a Standard Bipolar Technology

9K 150 ps-Gates on an ECL Masterslice Cell Array

An Addressable Controller for a Large Size Display Panel

An Accurate Biomedical Temperature Transducer with On-Chip Microcomputer Interfacing

Implantable Multichannel CMOS Stimulator for Cochlear Prosthesis

ESSCIRC '84: Tenth European Solid-State Circuits Conference

ESSCIRC '83: Ninth European Solid-State Circuits Conference

ESSCIRC '82: Eighth European Solid-State Circuits Conference

ESSCIRC '81: 7th European Solid State Circuits Conference

ESSCIRC 80: 6th European Solid State Circuits Conference

Fifth European Solid State Circuits Conference - ESSCIRC 79

ESSCIRC 78: 4th European Solid State Circuits Conference - Digest of Technical Papers

ESSCIRC '77: 3rd European Solid State Circuits Conference

ESSCIRC 76: 2nd European Solid State Circuits Conference

1975 First European Solid State Circuits Conference (ESSCIRC)

1 GHz, 16 mW, 2 Bit Analogue to Digital GaAs Converter

Content Provider	IEEE Xplore Digital Library
Author	Ducourant, Thierry Binet, Michel Baelde, Jean-Claude Talmud, Irene
Copyright Year	1985
Description	Author affiliation: Laboratoires d'Electronique et de Physique Appliquée, 3, avenue Descartes, 94450 Limeil-Brévannes, France. Tél. (1).569.96.10 (Ducourant, Thierry; Binet, Michel; Baelde, Jean-Claude; Talmud, Irene)
Abstract	There will be in the near future, a strong demand for ultra high speed, medium resolution analogue to digital (A/D) converters to be used in various field of applications such as oscilloscopy, telecommunication systems and especially radar signal processing. 8 bit, 100 MHz converters are already available in silicon technology; but the need is rather in the gigabit range which seems, at least today, hard to achieve because of a much too high power consumption. GaAs has proved to be very attractive as far as speed is concerned especially for digital circuits, but also for analogue ones: high speed decision circuits (1), comparators (2) and even 3 bit A/D (3) have already been reported. However the limited sensitivity of the comparators and their high power consumption (450 mW for 2 bit A/D) made it difficult to envisage converters with higher resolution. Using a new comparator design and a N-OFF GaAs process, we have fabricated a 1 GHz, 2 bit, 16 mW** A/D converter. This represents a real breakthrough beause of the much lower power consumption than that of any other approaches. The converter is organised in a parallel architecture which is the best way to reach both a medium resolution and a high speed. Three comparators are utilized for implementing the two bits, BO and Bl which are available in a Gray code. A fourth one produces an overflow indication. Figure 1 shows the block diagram of the circuit and a microphotograph is given on figure 2.
Starting Page	53
Ending Page	56
File Size	563821
Page Count	4
File Format	PDF
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1985-09-16
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Gallium arsenide Analog-digital conversion Energy consumption MESFETs Solid state circuits Signal resolution Radar applications Radar signal processing Signal processing Silicon
Content Type	Text
Resource Type	Article

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