NDLI: A CMOS RF front-end with on-chip antenna for V-band broadband wireless communications

Content Provider	IEEE Xplore Digital Library
Author	Chao-Shiun Wang Juin-Wei Huang Shon-Hang Wen Shih-Huang Yeh Chorng-Kuang Wang
Copyright Year	2007
Description	Author affiliation: Nat. Taiwan Univ., Taipei (Chao-Shiun Wang; Juin-Wei Huang; Shon-Hang Wen)
Abstract	This paper presents a V-band receiver front-end for broadband wireless applications. This design consists of an on- chip antenna, a low noise amplifier and a down-conversion mixer with a built-in voltage controlled oscillator as the local oscillator signal. The CPW-fed folded-slot antenna structure was adopted in this work to optimize input impedance matching for the LNA. The measured power gain and input P1dB of the proposed V-band LNA are 18 dB and -17.5 dBm, respectively. The measured isotropic conversion gain at 50 GHz is 23.4 dB. The total V-band RF front-end receiver dissipates 36.6 mW with a 1.2 V supply voltage. The receiver front-end with the on-chip antenna is implemented in a standard 0.13 mum RF CMOS technology without post processing.
Starting Page	143
Ending Page	146
File Size	550708
Page Count	4
File Format	PDF
ISBN	9781424411252
ISSN	19308833
DOI	10.1109/ESSCIRC.2007.4430266
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-09-11
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Broadband antennas Radio frequency Broadband communication Wireless communication Antenna measurements Gain measurement CMOS technology Signal design Broadband amplifiers Low-noise amplifiers MIXER ANTENNA V-BAND LNA
Content Type	Text
Resource Type	Article

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