NDLI: A 66 × 66 pixels analog edge detection array with digital readout

Content Provider	IEEE Xplore Digital Library
Author	Schemmel, J. Loose, M. Meier, K.
Copyright Year	1999
Description	Author affiliation: Heidelberg University, Heidelberg, Germany (Schemmel, J.)
Abstract	Edge detection is a common first step in artificial vision systems. Usually this task is performed by computation on digitized data from an analog CCD or CMOS camera. This paper describes an analog approach to edge detection using a kind of resistive fuse algorithm. 66 × 66 pixels are interconnected with their nearest neighbors by a novel combination of switched capacitor resistors and comparators. The chip accepts analog input up to 10 MHz and delivers digital edge data with an internal data rate of 550 Mbyte/s. The typical processing time for one frame is only 2µs. An integrated digital sequencer with static program memory allows versatile control of the algorithm. The presented chip is especially suited for integration as an analog front end in larger systems, preferable on a single die. It eliminates the need for an analog to digital converter and its high output data rate and programmability make it possible to look at the same image under different aspects more than once.
Starting Page	298
Ending Page	301
File Size	166089
Page Count	4
File Format	PDF
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-09-21
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Editions Frontieres
Subject Keyword	Image edge detection Machine vision Analog computers Charge coupled devices CMOS image sensors Charge-coupled image sensors Cameras Fuses Nearest neighbor searches Capacitors
Content Type	Text
Resource Type	Article

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