NDLI: Dynamic effects in SOI MOSFET's

Content Provider	IEEE Xplore Digital Library
Author	Giffard, B. Auberton-Herve, A.J. Goutti, F.
Copyright Year	1991
Abstract	The use of SOI (silicon-on-insulator) and conventional bulk MOSFETs by circuit designers is similar in a wide range of functions for logic purposes. Differences may appear when asynchronous design is used, due to floating body effects. The consequences of direct coupling between drain and source of a MOSFET in the OFF-state are discussed, and the characterization of this effect for various SOI technologies is presented. Two mechanisms are proposed to explain the results: a capacitive coupling between drain and floating body, which corresponds to a drain to source coupling when the floating body follows the source potential; and a dynamic bipolar effect in which the base current is constituted by the gate oxide charge in accumulated mode. This effect leads to a parasitic drain to source discharge, which can result in an upset in a SRAM memory cell or in a dynamic latch. It is found that a careful design must be done if functions like dynamic or static latch are needed.
Starting Page	160
Ending Page	161
File Size	126805
Page Count	2
File Format	PDF
ISBN	0780301846
DOI	10.1109/SOI.1991.162906
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-10-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Fault location Diodes Pulse measurements Latches Gain measurement Bipolar transistors Logic design Logic circuits Coupling circuits
Content Type	Text
Resource Type	Article

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